AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

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AMD64 Technology 26568—Rev. 3.05—September 2003 PSHUFHW Packed Shuffle High Words Moves any one of the four packed words in the high-order quadword of an XMM register or 128-bit memory location to each word in the high-order quadword of another XMM register. In each case, the value of the destination word is determined by a two-bit field in the immediate-byte operand, with bits 0 and 1 selecting the contents of the low-order word, bits 2 and 3 selecting the second word, bits 4 and 5 selecting the third word, and bits 6 and 7 selecting the high-order word. Refer to Table 1-5 on page 281. A word in the source operand may be copied to more than one word in the destination. The low-order quadword of the source operand is copied to the low-order quadword of the destination register. Mnemonic Opcode Description PSHUFHW xmm1, xmm2/mem128, imm8 F3 0F 70 /r ib Shuffles packed 16-bit values in high-order quadword of an XMM register or 128-bit memory location and puts the result in highorder quadword of another XMM register. xmm1 xmm2/mem128 127 112 111 96 95 80 79 64 63 0 imm8 7 0 280 PSHUFHW 127 112 111 96 95 80 79 64 63 0 mux mux mux mux pshufhw.eps
26568—Rev. 3.05—September 2003 AMD64 Technology Table 1-5. Immediate-Byte Operand Encoding for PSHUFHW Related Instructions PSHUFD, PSHUFLW, PSHUFW rFLAGS Affected None MXCSR Flags Affected None Destination Bits Filled Immediate-Byte Bit Field 79–64 1–0 95–80 3–2 111–96 5–4 127–112 7–6 Value of Bit Field Source Bits Moved 0 79–64 1 95–80 2 111–96 3 127–112 0 79–64 1 95–80 2 111–96 3 127–112 0 79–64 1 95–80 2 111–96 3 127–112 0 79–64 1 95–80 2 111–96 3 127–112 PSHUFHW 281
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