AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

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AMD64 Technology 26568—Rev. 3.05—September 2003 Exception Real Invalid-operation exception (IE) X X SIMD Floating-Point Exceptions 362 SQRTPS Virtual 8086 Protected Cause of Exception X X X X A source operand was an SNaN value. A source operand was negative (not including –0). Denormalized-operand exception (DE) X X X A source operand was a denormal value. Precision exception (PE) X X X A result could not be represented exactly in the destination format.
26568—Rev. 3.05—September 2003 AMD64 Technology SQRTSD Square Root Scalar Double-Precision Floating-Point Computes the square root of the low-order double-precision floating-point value in an XMM register or in a 64-bit memory location and writes the result in the low-order quadword of another XMM register. The high-order quadword of the destination XMM register is not modified. Taking the square root of +infinity returns +infinity. Mnemonic Opcode Description SQRTSD xmm1, xmm2/mem64 F2 0F 51 /r Computes square root of double-precision floating-point value in an XMM register or 64-bit memory location and writes the result in the destination XMM register. Related Instructions RSQRTPS, RSQRTSS, SQRTPD, SQRTPS, SQRTSS rFLAGS Affected None MXCSR Flags Affected xmm1 xmm2/mem64 127 64 63 0 127 64 63 0 FZ RC PM UM OM ZM DM IM DAZ PE UE OE ZE DE IE M M M 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Note: A flag that may be set to one or cleared to zero is M (modified). Unaffected flags are blank. square root sqrtsd.eps SQRTSD 363
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