AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

26568—Rev. 3.05—September 2003 AMD64 Technology
ANDNPS Logical Bitwise AND NOT
Packed Single-Precision Floating-Point
Performs a bitwise logical AND of the four packed single-precision floating-point
values in the second source operand and the one’s-complement of the corresponding
four packed single-precision floating-point values in the first source operand and
writes the result in the destination (first source). The first source/destination operand
is an XMM register. The second source operand is another XMM register or 128-bit
memory location.
Mnemonic Opcode Description
ANDNPS xmm1, xmm2/mem128 0F 55 /r Performs bitwise logical AND NOT of four packed single-precision
floating-point values in an XMM register and in another XMM
register or 128-bit memory location and writes the result in the
destination XMM register.
Related Instructions
ANDNPD, ANDPD, ANDPS, ORPD, ORPS, XORPD, XORPS
rFLAGS Affected
None
AND
AND
xmm1 xmm2/mem128
127 96 95 64 63 32 31
0
invert
invert
invert
AND
invert
AND
127 96 95 64 63 32 31
0
andnps.eps
ANDNPS 17