09.01.2013 Views

AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

<strong>AMD</strong><strong>64</strong> Technology 26568—Rev. 3.05—September 2003<br />

MOVSD Move Scalar Double-Precision Floating-Point<br />

Moves a scalar double-precision floating-point value:<br />

� from the low-order <strong>64</strong> bits of an XMM register or a <strong>64</strong>-bit memory location to the<br />

low-order <strong>64</strong> bits of another XMM register, or<br />

� from the low-order <strong>64</strong> bits of an XMM register to the low-order <strong>64</strong> bits of another<br />

XMM register or a <strong>64</strong>-bit memory location.<br />

If the source operand is an XMM register, the high-order <strong>64</strong> bits of the destination<br />

XMM register are not modified. If the source operand is a memory location, the highorder<br />

<strong>64</strong> bits of the destination XMM register are cleared to all 0s.<br />

Mnemonic Opcode Description<br />

MOVSD xmm1, xmm2/mem<strong>64</strong> F2 0F 10 /r Moves double-precision floating-point value from an XMM<br />

register or <strong>64</strong>-bit memory location to an XMM register.<br />

MOVSD xmm1/mem<strong>64</strong>, xmm2 F2 0F 11 /r Moves double-precision floating-point value from an XMM<br />

register to an XMM register or <strong>64</strong>-bit memory location.<br />

180 MOVSD

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!