AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

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AMD64 Technology 26568—Rev. 3.05—September 2003 PSRAD Packed Shift Right Arithmetic Doublewords Right-shifts each of the packed 32-bit values in the first source operand by the number of bits specified in the second source operand and writes each shifted value in the corresponding doubleword of the destination (first source). The first source/destination and second source operands are: � an XMM register and another XMM register or 128-bit memory location, or � an XMM register and an immediate byte value. The high-order bits that are emptied by the shift operation are filled with the sign bit of the doubleword’s initial value. If the shift value is greater than 31, each doubleword in the destination is filled with the sign bit of the doubleword’s initial value. Mnemonic Opcode Description PSRAD xmm1, xmm2/mem128 66 0F E2 /r Right-shifts packed doublewords in an XMM register by the amount specified in the low 64 bits of an XMM register or 128-bit memory location. PSRAD xmm, imm8 66 0F 72 /4 ib Right-shifts packed doublewords in an XMM register by the amount specified in an immediate byte value. 294 PSRAD
26568—Rev. 3.05—September 2003 AMD64 Technology Related Instructions PSLLD, PSLLDQ, PSLLQ, PSLLW, PSRAW, PSRLD, PSRLDQ, PSRLQ, PSRLW rFLAGS Affected None MXCSR Flags Affected None shift right xmm1 xmm2/mem128 127 96 95 64 63 32 31 0 shift right . . . . . shift right xmm imm8 127 96 95 64 63 32 31 0 . . . shift right 127 64 63 0 psrad-128.eps PSRAD 295 7 0
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AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

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