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AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

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26568—Rev. 3.05—September 2003 <strong>AMD</strong><strong>64</strong> Technology<br />

ADDPS Add Packed Single-Precision Floating-Point<br />

Adds each packed single-precision floating-point value in the first source operand to<br />

the corresponding packed single-precision floating-point value in the second source<br />

operand and writes the result of each addition in the corresponding quadword of the<br />

destination (first source). The first source/destination operand is an XMM register.<br />

The second source operand is another XMM register or <strong>128</strong>-bit memory location.<br />

Mnemonic Opcode Description<br />

ADDPS xmm1, xmm2/mem<strong>128</strong> 0F 58 /r Adds four packed single-precision floating-point values in an XMM<br />

register and another XMM register or <strong>128</strong>-bit memory location and<br />

writes the result in the destination XMM register.<br />

Related Instructions<br />

ADDPD, ADDSD, ADDSS<br />

rFLAGS Affected<br />

None<br />

add<br />

add<br />

xmm1 xmm2/mem<strong>128</strong><br />

127 96 95 <strong>64</strong> 63 32<br />

31<br />

0<br />

add<br />

add<br />

127 96 95 <strong>64</strong> 63 32 31<br />

0<br />

addps.eps<br />

ADDPS 7

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