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AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

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26568—Rev. 3.05—September 2003 <strong>AMD</strong><strong>64</strong> Technology<br />

SUBSS Subtract Scalar Single-Precision Floating-Point<br />

Subtracts the single-precision floating-point value in the low-order doubleword of the<br />

second source operand from the single-precision floating-point value in the low-order<br />

doubleword of the first source operand and writes the result in the low-order<br />

doubleword of the destination (first source). The three high-order doublewords of the<br />

destination are not modified. The first source/destination operand is an XMM register.<br />

The second source operand is another XMM register or 32-bit memory location.<br />

Mnemonic Opcode Description<br />

SUBSS xmm1, xmm2/mem32 F3 0F 5C /r Subtracts low-order single-precision floating-point value in an<br />

XMM register or in a 32-bit memory location from low-order<br />

single-precision floating-point value in another XMM register and<br />

writes the result in the destination XMM register.<br />

Related Instructions<br />

SUBPD, SUBPS, SUBSD<br />

rFLAGS Affected<br />

None<br />

xmm1 xmm2/mem32<br />

127 32 31 0 127 32<br />

31 0<br />

subtract<br />

subss.eps<br />

SUBSS 379

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