AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

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AMD64 Technology 26568—Rev. 3.05—September 2003 Exception Real Alignment check, #AC X X An unaligned memory reference was performed while alignment checking was enabled. SIMD Floating-Point Exception, #XF Invalid-operation exception (IE) Denormalized-operand exception (DE) X X X There was an unmasked SIMD floating-point exception while CR4.OSXMMEXCPT = 1. See SIMD Floating-Point Exceptions, below, for details. SIMD Floating-Point Exceptions 32 CMPSD X X Virtual 8086 Protected Cause of Exception X X X X A source operand was an SNaN value. A source operand was a QNaN value, and the comparison does not allow QNaN values (refer to Table 1-1 on page 24). X X X A source operand was a denormal value.
26568—Rev. 3.05—September 2003 AMD64 Technology CMPSS Compare Scalar Single-Precision Floating-Point Compares the single-precision floating-point value in the low-order 32 bits of the first source operand with the single-precision floating-point value in the low-order 32 bits of the second source operand and writes the result in the low-order 32 bits of the destination (first source). The type of comparison is specified by the three low-order bits of the immediate-byte operand, as shown in Table 1-1 on page 24. The result of the compare is a 32-bit value of all 1s (TRUE) or all 0s (FALSE). The first source/destination operand is an XMM register. The second source operand is another XMM register or 32-bit memory location. The three high-order doublewords of the destination XMM register are not modified. Mnemonic Opcode Description CMPSS xmm1, xmm2/mem32, imm8 F3 0F C2 /r ib Compares single-precision floating-point values in an XMM register and an XMM register or 32-bit memory location. xmm1 xmm2/mem32 127 32 31 0 127 32 31 0 imm8 7 0 compare Some compare operations that are not directly supported by the immediate-byte encodings can be implemented by swapping the contents of the source and destination operands and then executing the appropriate compare instruction using the swapped values. These additional compare operations are shown in Table 1-1 on page 24. When swapping operands, the first source XMM register is overwritten by the result. cmpss.eps CMPSS 33
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AMD x86-64 Architecture Programmer's Manual, Volume 4, 128-Bit ...

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