Xilinx Reliability Monitor Report - Quarter 4 CY 2001

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Combined Lots: Failures: Device on test: Actual device hours: Mean of Stress Test hour: Equivalent device hours @ Tj=125C: Equivalent device hours @ Tj=55C: Equivalent device hours @ Tj=25C: Failure Rate (60% C.L.) in FITS @ Tj=55C: Failure Rate (60% C.L.) in FITS @ Tj=25C: Jan. 1, 2002 P. 118 Reliability Testing Summary High Temperature Life Test Qualification & Monitor Combined Technology: Device Type: Package Type: Actual Junction Temperature: Assumed Activation Energy: Confidence Level: Si Gate CMOS XC17VXX, XC18VXX, XC95XXX, XC95XXXXL Various 145C 0.58 ev for Eprom; 0.7 e.v. for XC95XXX @ C.L. = 60% XC17VXX XC18VXX XC95XX XC95XXXXL 8 2 607 462,700 762 1,038,957 38,327,908 2.04E+08 81 10 3 0 152 272,840 1,795 612,641 22,600,792 1.78E+08 41 5 6 0 330 229,938 697 610,367 47,500,542 5.74E+09 19 2 8 0 632 461,807 731 1,225,860 95,399,990 1.15E+09 10 1 ®
Combined Lots: Failures: Device on test: Actual device hours: Mean of Stress Test hour: Equivalent device hours @ Tj=125C: Equivalent device hours @ Tj=55C: Equivalent device hours @ Tj=25C: Jan. 1, 2002 P. 119 Reliability Testing Summary High Temperature Life Test Qualification & Monitor Combined Technology: Device Type: Package Type: Actual Junction Temperature: Assumed Activation Energy: Confidence Level: 0.6um Si Gate CMOS XC17XXXE PD8 145C 0.58 ev 60% XC17256E XC17XXXE 3 0 197 203,230 1,032 456,337 16,834,625 1.33E+08 Failure Rate (60% C.L.) in FITS @ Tj=55C: Failure Rate (60% C.L.) in FITS @ Tj=25C: 3 0 197 203,230 1,032 456,337 16,834,625 1.33E+08 54 7 ®
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Jan. 1, 2002 P. 1 The Reliability D
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Jan. 1, 2002 P. 3 TABLE OF CONTENTS
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Jan. 1, 2002 P. 5 2.1 Wafer Process
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Jan. 1, 2002 P. 7 2.3 Device Qualif
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Jan. 1, 2002 4. Failure Analysis: A
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Jan. 1, 2002 P. 11 F/A ACRONYM DESC
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Temperature (C o ) XILINX Typical C
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Jan. 1, 2002 P. 15 ESD and Latch-up
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(1) Measured on XC1765D (2) Measure
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Jan. 1, 2002 P.19 Failure Rate Summ
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Combined Lots: Failures: Device on
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Jan. 1, 2002 P.47 Combined Started
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Jan. 1, 2002 P. 173 Reliability Tes
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Package Details Motherboard Design
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Package Motherboard Jan. 1, 2002 P
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Package Motherboard Jan. 1, 2002 P
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Xilinx Reliability Monitor Report - Quarter 4 CY 2001

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