Xilinx Reliability Monitor Report - Quarter 4 CY 2001

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Jan. 1, 2002 P.18 The following data was collected from regular qualification and monitor data Majority of the data was collected from the latest 2 years. The FPGA Products
Jan. 1, 2002 P.19 Failure Rate Summary Process Technology family Device hours @125 o C FIT1 0.15 um 1,021,490 12 0.18/0.15 um 190,084 62 0.18 um 1,784,895 22 0.22/0.18 um 2,164,364 5 0.22 um 996,166 26 0.25 um 1,875,994 6 0.35 um (Eprom) 1,651,598 51 0.35 um 3,747,783 3 0.5 um 1,149,790 10 0.6 um (Eprom) 1,886,970 13 0.6 um 480,228 25 Note: 1. FIT is calculated base on 0.7 ev (0.58 ev for EPROM), 60% C.L. and Tj of 55 o C 2. The data were collected through latest 2 years of reliability qualification & monitoring program. ®
Page 1 and 2: Jan. 1, 2002 P. 1 The Reliability D
Page 3 and 4: Jan. 1, 2002 P. 3 TABLE OF CONTENTS
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Page 13 and 14: Temperature (C o ) XILINX Typical C
Page 15 and 16: Jan. 1, 2002 P. 15 ESD and Latch-up
Page 17: (1) Measured on XC1765D (2) Measure
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Package Details Motherboard Design
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Package Motherboard Jan. 1, 2002 P
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Package Motherboard Jan. 1, 2002 P
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Xilinx Reliability Monitor Report - Quarter 4 CY 2001

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