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PowerFlex 750-Series AC Drives User Manual

PowerFlex 750-Series AC Drives User Manual

PowerFlex 750-Series AC Drives User Manual

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Programming and Parameters 3-75FileGroupNo.NameDescriptionValuesRead-WriteData Type651 AltSpdErr FltrBWAlternate Speed Error Filter BandwidthProvides an independent setting for the same function as P644 [Spd Err Filt BW],but is active only when Automatic Feedback Loss Switchover occurs (indicated bybit 5 of P936 [Drive Status 2])When P648 [Alt Speed Reg BW] is set to a non-zero value, this filter setting willbe automatically selected. If P648 [Alt Speed Reg BW] is set to zero, then thisfilter setting must be manually adjusted. An error filter value of 0 will disable thefilter. This filter is normally set to at least 3 to 5 times the value of P648 [Alt SpeedReg BW]. Units for the error filter are rad/sec (R/S).The rules that are used to set the error filter bandwidth in automatic mode are asfollows:1. If the alternate motor velocity feedback is Open Loop, then the error filter is setto 5 times P648 [Alt Speed Reg BW].2. If an alternate motor velocity feedback device has been selected and P704[InAdp LdObs Mode] = 1 “InertiaAdapt,” then the error filter is set to 3 timesP648 [Alt Speed Reg BW].3. If an alternate motor velocity feedback device has been selected and P704[InAdp LdObs Mode] 0 “Disabled” or 2 “LoadObserver” then the error filter isusing a table look up value determined by the setting of P129 [Alt VelFdbkFltr].Units: R/SDefault: 50.00Min/Max: 0.00 / 8000.00RW RealSPEED CONTROLSpeed Regulator652 SReg Trq PresetSpeed Regulator Torque PresetSets the initial value of P654 [Spd Reg Int Out]. This is the output of the vectorspeed regulator’s integral channel, and. will be present in P654 [Spd Reg Int Out]when the regulator is first enabled (for example, upon rise of start or jog). Thenormal, default setting for this parameter is zero. In some applications, it may benecessary to preset the speed regulator integrator to a non-zero setting. This willresult in the regulator’s output reaching its final steady state value sooner than itwould if the integrator started from zero.Units: %Default: 0.00Min/Max: –/+800.00RW Real653 Spd Loop DampingSpeed Loop DampingSets the damping factor of the vector speed loop’s characteristic equation.Damping will affect the integral gain when a non-zero bandwidth has beenentered. A damping factor of 1.0 is considered critical damping. Lowering thedamping will produce faster load disturbance rejection, but may cause a moreoscillatory response. When the speed regulator bandwidth is zero, gains are setmanually and damping factor has no effect.654 Spd Reg Int OutSpeed Regulator Integrator OutputDisplays the current value of the vector speed regulator’s integral channel.655 Spd Reg Pos LmtSpeed Regulator Positive LimitAdjusts the upper limit of the vector speed regulator’s output.656 Spd Reg Neg LmtSpeed Regulator Negative LimitAdjusts the lower limit of the vector speed regulator’s output.Default: 1.0000Min/Max: 0.5000 / 65.0000RW RealUnits: %Default: 0.00Min/Max: –/+800.00RO RealUnits: %Default: 300.00Min/Max: 0.00 / 600.00RW RealUnits: %Default: –300.00Min/Max: –600.00 / 0.00RW Real<strong>PowerFlex</strong> <strong>750</strong>-<strong>Series</strong> <strong>User</strong> <strong>Manual</strong> – Publication <strong>750</strong>-UM001C-EN-P – September 2009

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