PowerFlex 750-Series AC Drives User Manual

G-8 Using DeviceLogixDLX Real SP1 is the intermediary register that allows the two Datalinks towork together.Example 2 – Writing data to the networkThe DeviceLogix program controls an Analog Output value in DLX Out 01which is written to DLX Real SP2.The DLX Real SP2 value is output to the network.DLX Real SP2 is the intermediary register that allows the two Datalinks towork together.PowerFlex 753 (all) and PowerFlex 755 v2.xxx (and higher)Datalinks and internal DeviceLogix scratchpad registers (P82…P105)DLX In’s and DLX Out’s are Datalinks and can not be directly mapped toeach other or another Datalink, such as a Datalink in the Port 13 EmbeddedEthernet. Although the same method used with PowerFlex 755 v1.xxxfirmware can be employed, there is a more efficient method that does notrequire a DeviceLogix Datalink to be used.Example 1 – Reading data from the networkA value from the network is input to DLX Real InSP1.Drive Datalink Value753 Port 0 P895 [Data In A1] Port 14: DLX Real InSP1755 Port 13 P1 [DL From Net 01]DLX Real InSP1 can now be used as a Hardware Analog Input and useddirectly with a Function Block (a DeviceLogix Datalink is not required).PowerFlex 750-Series User Manual – Publication 750-UM001C-EN-P – September 2009