CANoe DENoe - KEMT FEI TUKE

The CAN controllers are provided with 16 MHz clocks when delivered, and as a rule
16000 (kHz) should be entered in this box. However, it may be necessary to change
out the clocks for special applications. Then the appropriate frequency must be entered
here.
In the Samples input box you set the number of bus samples per bit time. Possible
values are:
• 1 Sample.
This setting is recommended for High Speed Buses (SAE Class C).
• 3 Samples.
This setting is recommended for Low/Medium Speed Buses (Classes A and B)
to filter out level peaks on the bus.
The two Bus Timing Registers define how an individual bit of the serial bit stream is
assembled on the bus. Please refer to the data sheet for the CAN controller (SJA
1000/82C200/82527/72005) for the values that should be entered here. Input the
values as hexadecimal numbers. On the right side of the dialog box you can determine
whether the entered values are plausible (e.g. whether the desired baudrate
has been achieved).
There are multiple Bit Timing Register pairs for a given baudrate which determine the
timing of the CAN controller with regard to the sampling time point, number of BTL
cycles and synchronization jump width (SJW). You can view a selection of allowable
register pairs in the list of sampling options.
Displayed in this list are all Bus Timing Register values for the configured baudrate
and sample count. Shown next to the register values are associated values such as
the sampling time point (Sample) in percent of bit time after the beginning of the bit,
number of BTL cycles (BTL cycles) and the synchronization jump width (SJW).
Once you have changed the baudrate or sample count, click on the list box to update
the list. Afterwards you can select the desired sampling option.
Representation of Bit Timing
The figure in the upper right area of the sub-dialog sketches the timing of the CAN
controller resulting from the configured register values. It depicts the bit time schematically,
subdivided into three regions Sync (orange), Tseg1 (blue) and Tseg2
(green).
The number of subdivisions corresponds to the value that is set for BTL cycles. The
sampling time point (border between Tseg1 and Tseg2) is identified by one or three
small red triangle(s) according to the setting for sample count. The ratio between the
bit length up to the sampling point and the overall length of the represented bit time
corresponds to the percent value of the actively selected list entry.
Above the figure you see the Preview Synchronization Edge selection box which is
deactivated by default, whereby the slider beneath it is also deactivated. Please note
that this slider does not have any functionality as a control; it is only used for previewing
purposes.
Click on the Preview Synchronization Edge selection box to activate previewing.
With the help of the slider above the figure you can examine the effects of the synchronization
edge and synchronization jump width on CAN controller timing. The
© Vector Informatik GmbH CANoe/DENoe Manual Version 4.1.1
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