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ISBN 978-952-5726-09-1 (Print) Proceedings of the Second International Symposium on Networking and Network Security (ISNNS ’10) Jinggangshan, P. R. China, 2-4, April. 2010, pp. 234-237 Research of System-Switch Mechanism Based on sCPU-dBUS Architecture Fengjing Shao, Xiaoning Song, and Rencheng Sun College of Information Engineering QingDao University, QDU Qingdao, China sfj@qdu.edu.cn, helensongmail@163.com, qdsunstar@163.com Abstract—sCPU-dBUS architecture is a solution for the problem of network security from the angle of changing the computer’s architecture. In order to manage the resources on this architecture efficiently, we adopt the operating system with double-subsystems. In this thesis, as an important part of the operating system for the sCPU-dBUS architecture, a system-switch mechanism is designed. Firstly, the kernel bus-switch mechanism is designed. Secondly, the system-switch flows of each stage during the OS’s starting and running are designed. between two subsystems, there should be a good system-switch mechanism [4] . In this article, a system-switch mechanism is designed. Index Terms—sCPU-dBUS, double-subsystem, system-switch, clock interrupt I. INTRODUCTION As the problem of network security is becoming more and more serious, the solutions aren’t confined to the existing ways any more, such as virus scanning technology, firewall technology and IDS. Many experts hope to solve network security problem from a new angle. The single-cpu and dual-bus secure computer architecture (sCPU-dBUS) is a solution from the angle of improving computer architecture. The architecture of sCPU-dBUS is shown in Figure1 [1] . sCPU-dBUS secure computer architecture contains one CPU and two independent fast system sub-buses which are called local bus and network bus. The CPU is connected to the shared bus, and also can be connected with local bus or network bus through controlling the bus bridge [2, 3] . The bridge makes sure that only one bus can be connected with the CPU at any time. Network bus and all the devices which are connected to the network bus consist of network sub-area, while local bus and all the devices which are connected to the local bus consist of local sub-area. In the sCPU-dBUS secure computer architecture, all network devices are connected to the network bus. When network intrusions happen, the destructions will be limited to the network sub-area as the bridge is not connected to the local bus. User’s important data are stored in the local-area, so it can avoid being destroyed. As the sCPU-dBUS secure architecture has one CPU and two sub-areas, there should be a befitting operating system to support this architecture. In order to enhance the security of the system, the operating system is designed containing two sub-kernels: the local sub-kernel and the network sub-kernel. The two sub-kernels run in two sub-areas, and they are coordinating relationship rather than subordinate relationship. In order to implement communication © 2010 ACADEMY PUBLISHER AP-PROC-CS-10CN006 234 II. Figure 1. sCPU-dBUS secure architecture SYSTEMIC ANALYSIS OF SYSTEM-SWITCH MECHANISM System switch is an important part of the double-kernel operating system. At the booting stage of operating system, there are two subsystems needing to be booted, so the system-switch mechanism is needed. And when the operating system is running after it is started, there still exist two situations that need system-switch mechanism to realize system-switch. Firstly, when the user wants to do some operations in the other subsystem, system-switch occurs and this situation is called user-control switch. Secondly, when some data are needed to be transferred to the other subsystem, system-switch occurs and this one is called data-transfer switch. In this situation, system should be switched automatically until the data transfer is done. In order to make one sub-system continue running from the breakpoint after CPU is given back from the other sub-system, two aspects should be conserved. The first is all of process contexts and the second is address of the next instruction. So two blocks of spaces should be open up to store the information, and the spaces should be on the instruction cache which is mounted on the shared bus for the sake that both of two sub-systems can visit. The two blocks of spaces are shown as follows:
1) Process context storage areas. It is used to store process contexts before present subsystem is interrupted. There are two process context storage areas, which are separately used to store the local subsystem’s contexts and the network subsystem’s contexts. Certainly, they have different starting address. 2) Switch back registers. It is used to store address of the next instruction that present sub-system is going to execute at the time of being interrupted. There are also two registers in order to store two sub-systems’ address of the next instruction separately. In the next, systemic design of switch mechanism is elaborated. And then, system-switch flows of booting and running stages of operating system are illustrated. III. DESIGN OF SYSTEM-SWITCH MECHANISM In order to implement the system-switch between two sub-systems, a system-switch mechanism is designed. Firstly, as it has two sub-buses and they are both connected to the shared bus according to the bridge, some values can be assigned to the bus-bridge controller register to realize connection with different sub-systems. Secondly, as mentioned above, process contexts should be conserved for the sake that sub-systems could run from the breakpoint. And in our mechanism, clock interrupt processor is chosen as the breakpoint of system-switch in order to make system switch in time [5] . Thirdly, one piece of space in instruction cache is opened up to conserve the switch-flag. The switch-flag is a variable which is used to point out whether system need to be switched or which switch direction should be adopted. Both of local sub-system and network sub-system can visit it and change its value. Besides, switch command is designed so that users can control system-switch through command. Specific design is shown as follows: 1) Trigger of system-switch. System switch mechanism adopts command as the trigger. Users control systems’ switch through inputting some commands. After users input switch commands, a process called switch process will be created. This process will set the switch flag according to the parameters of switch command. 2) Entrance of system-switch. As clock interrupt occurs periodically, it is chosen as the breakpoint. In our mechanism, clock processor is modified. Some procedures are added into it which are used to judge switch flag and then determine whether system should be switched and which direction should be changed to. 3) The core switch program. The core switch program is called bus-switch program, and it is core module to realize bus switch. Bus-switch program is located in the instruction cache. And apparently it has two parts which are used in the different directions of system switch: local-network bus-switch program and network-local bus-switch program [6] . They are stored in different starting addresses of instruction cache. In this bus-switch program, some functions are implemented as follows: a) Store clock interrupt processor’s context of present sub-system to its process context storage area, such as the data segment, relevant registers, stack and so on. b) Assign specific values to bus bridge controller register to make shared bus connect to target sub-system’s bus. c) Restore the values of target sub-system’s process context storage area to the relevant registers, stack and so on. And then, PC register is assigned as the value of target sub-system’s switch back register. 4) Exit of system-switch. After system bus is switched and the context and PC are restored, the system enters into target sub-system’s Figure 2. Flow chart of system-switch Figure 3. Flow chart of system-switch command clock interrupt processor and goes on running from the breakpoint. Figure2 is the flow chart of system-switch. 235
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Proceedings The Second Internationa
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Table of Contents Message from the
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Zuming Xiao, Zhan Guo, Bin Tan, and
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Message from the Symposium Chairs T
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Second International Symposium on N
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model that can deal with time serie
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training for the Wushu competition
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information, called weak uncertain
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Student side Student side Student s
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If we define element of student as
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QoS, each frame data is divided int
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for Imaging Two and Three Phase Flo
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A. Profiling&following control algo
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Research and Realization about Conv
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According to maximum membership deg
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Ⅲ. AN IMPROVED DNA ALGORITHM FOR
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Ⅴ.CONCLUSION REMARKS DNA computer
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its first child q 1 on the left, th
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II. RELATED WORK A. Mobile Service
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special services. SOAP is used to b
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detection methods of DDoS attacks m
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Step4 calculate the new subordinate
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Figure 1. An analysis of the partit
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distance of view point. Given that
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Ⅳ. EVALUATION OF BLENDED LEARNING
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symmetric with respect to the origi
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each sample belongs to each categor
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A. Data Preparing To generate our t
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Strong earthquake 0.1< M L
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indirect causes, and the logical re
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egression. Granger causality test i
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B. Evaluation We have evaluated thi
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used as a source and neighboring ce
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Combinational logic unit failures i
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Tabal.1 Combinational fault logic t
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TABLE I. DESCRIPTION OF PROPOSITION
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Figure 9. (a)the original image.(b)
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that studying being going to be to
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module, communication module, apper
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system testing can be seen that the
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III. AUTONOMIC RESOURCE ALLOCATION
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Keyboard event Application User mod
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some drilling fluid produces hydrog
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and minimum structural elements in
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B. Research on protocol actions Com
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ACKNOWLEDGMENT This work is funded
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