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A. design of system-switch command When system-switch command is executed, shell will automatically establish system-switch process. This process is used to set the switch-flag according to parameters of system-switch command. Besides, in order to prevent switch-flag from being changed unexpectedly when next clock interrupt comes, interrupts should be disabled during system-switch process is executed. After switch-flag is set successfully, interrupts will be enabled again [7] . At last, system-switch process exits. Flow chart of system-switch command is shown in Figure3. In order to accomplish the system-switches in different situations, system-switch command is designed to have different parameters. And system-switch process can refer to these parameters to set switch-flag. System-switch command is called BusSwitch. Parameters of BusSwitch, its parameters’ meaning and value of relevant switch flags are shown in table 1. TABLE 1. BusSwitch’ parameters and values of relevant switch-flag BusSwitch –p command values of switch-flag Parameter’s Local Network Meaning of the parameters value (-p) subsystem subsystem Stop system-switch, CPU n 0 0 works at present sub-area. u c System-switch under users’ control System-switch during data transmitting 3 3 1 2 B. clock interrupt processor The clock interrupt processor is the entrance and exit of system-switch and the controller. So it is the core of system-switch mechanism. Some procedures are added to the clock interrupt processor to judge the switch-flag. Then every time clock interrupt comes, clock interrupt processor firstly does some conventional processing, secondly judges switch-flag and then decides what kind of actions should be adopted [8] . The process flow of local-subsystem’s clock interrupt processor is shown in Figure4 (The flow in the braces is the process flow of network-subsystem’s clock interrupt processor): IV. SYSTEM-SWITCH FLOW ANALYSIS IN DIFFERENT STAGES System-switch occurs both at the stage of system booting and system running. Absolutely, there are some differences between two stages. A. system-switch flow in booting stage At this stage, we firstly start local-subsystem in order to assure the system’s safety. Local-subsystem’s bootloader and kernel are located in flash of local sub-area. System begins to run from the first address of local sub-area’s flash automatically. And system-switch occurs when we need to operate network sub-area. In order to assure that system will continue running from the bootloader of network subsystem after system switch, bootloader of local subsystem should do some extra jobs except its normal guidance and load: 1) Initialize all the devices mounted on the shared bus, load two system-switch programs to instruction cache. 2) Initialize process context storage area of both subsystems as zeros. 3) Assign network sub-system’s switch back register as the first address of network subsystem’s bootloader. According to system-switch mechanism, users can input the command “BusSwitch -u” to boot network sub-area and operate it. B. system-switch flow in running stage There are two system-switch situations during the running stage of operating system: user-control switch and data-transfer switch. User-control switch means that system-switch occurs when the users want to switch to the other subsystem and data-transfer switch means that the system is switched automatically when there are some data need to be transmitted to the other subsystem. In this situation, switch between two subsystems are automatically proceeding until data transmission is done. At last, target subsystem goes on running. According to system mechanism, users can input command “BusSwitch -u” to realize user-control switch while input “BusSwitch –c” to realize data-transfer switch. In situation of data-transfer switch, if local subsystem is running now, system-switch flag is set as 1. When next clock interrupt comes, clock interrupt processor finds switch-flag is 1, and then it sets switch-flag as 2 according to Figure4. Next, it goes on processing local subsystem’s tasks. When next clock interrupt comes, system is switched as it judges that switch-flag is 2. After network subsystem starts to run, interrupt return occurs and tasks of network subsystem are executed. In next clock interrupt, it judges switch-flag as 2, and then set it as 1. Tasks of network subsystem are executed again, that is receiving the data. Router process [9] judges whether data transfer has done, if yes, switch-flag is set as 0, and if no, nothing will done. When next clock interrupt comes, switch-flag is judged again, if it is 1, system-switch occurs, if it is 0, system stays at present subsystem. Figure 4. Flow of clock interrupt processor 236
V. CONCLUSION In this thesis, sCPU-dBUS secure computer architecture and the requirements of its operating system are introduced at the beginning. Then as the core part of its OS, requirements of system-switch between two sub operating systems are analyzed. According to these, system switch mechanism is designed. At last, the flows of operating system’s booting and running are illustrated. This system switch mechanism in this thesis has some reference values to the researchers who have relevant applications. Secure architecture intelligence network terminal technology ( 2006AA01Z110 ), 863 project, 800 thousand, 2006.12-2008.12. Secure architecture network terminal technology supporting remote reconfiguration, ( 09-2-3-19-chg ), QingDao achievement transformation project, 250 thousand, 2009.09-2011.09. REFERENCES [1] Fengjing Shao, Rencheng Sun, Kegang Diao, and Xiaopeng Wang, “A secure architecture of network computer based on single CPU and dual bus”, In Proc. Fifth IEEE International Symposium on Embedded Computing, Beijing, China, Oct. 2008. [2] Tiedong Wang, Fengjing Shao, Rencheng Sun, He Huang. “A hardware implement of bus bridge based on single CPU and dual bus architecture,” International Symposium on Computer Science and Computational Technology, Shanghai, China, December 2008. [3] Le Zhang, Fengjing Shao, Rencheng Sun, “Design and realization of embedded system developing platform hardware abstraction layer,” Journal of Qingdao University Engineering & Technology Edition, Vol.21, Mar, 2007. [4] Wenze Huang, Fengjing Shao, Rencheng Sun, A New Kind of Task Scheduling of Operating System Based on Dual-Bus Secure Architecture. 2009’Workshop on the Computer Network and Telecommunication. May 2009. [5] Rongkai Zhan. Linux kernel’s clock interrupt mechanism.[EB/OL]. http://www.linuxforum.net. [6] Ze Tian. Exploiture and Application of Embedded System [M]. Bet Jing:Bet Jing University of Aeronautics and Astronautics Press. 2005.1. [7] Jikun Sun, Xiaoquan Zhang. Detailed explanation of Embedded linux system development technology- based on ARM [M]. Bet Jing: Posts and telecom press. 2006.8. [8] Dongshan Wei. Embedded Linux application exploitation [M]. Bet Jing: Posts and telecom press. 2008.8. [9] Wei Wang,Fengjing Shao. An Inter-subsystem Data Transfer Mechanism Based on A New Computer Architecture with Single CPU and Dual Bus[C]. 2009 International Symposium on Intelligent Systems and Application. 2009,10. 237
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Proceedings The Second Internationa
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Table of Contents Message from the
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Zuming Xiao, Zhan Guo, Bin Tan, and
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Message from the Symposium Chairs T
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Second International Symposium on N
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model that can deal with time serie
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training for the Wushu competition
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information, called weak uncertain
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Student side Student side Student s
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If we define element of student as
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QoS, each frame data is divided int
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for Imaging Two and Three Phase Flo
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A. Profiling&following control algo
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Research and Realization about Conv
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PDF document structure is a tree st
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support 10 Mb / s. But ENC28J60 onl
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condition the first byte output of
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According to maximum membership deg
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ubber according to the mass ratio o
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Ⅲ. AN IMPROVED DNA ALGORITHM FOR
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Ⅴ.CONCLUSION REMARKS DNA computer
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its first child q 1 on the left, th
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chains can greatly improve efficien
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II. RELATED WORK A. Mobile Service
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special services. SOAP is used to b
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detection methods of DDoS attacks m
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Step4 calculate the new subordinate
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Figure 1. An analysis of the partit
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And the decay speed of buffer seque
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distance of view point. Given that
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Ⅳ. EVALUATION OF BLENDED LEARNING
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symmetric with respect to the origi
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each sample belongs to each categor
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A. Data Preparing To generate our t
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Strong earthquake 0.1< M L
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indirect causes, and the logical re
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egression. Granger causality test i
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B. Evaluation We have evaluated thi
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used as a source and neighboring ce
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Figure 3. Drainage networks generat
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Combinational logic unit failures i
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Tabal.1 Combinational fault logic t
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under the endorsement of both the m
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TABLE I. DESCRIPTION OF PROPOSITION
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Figure 2. The process of the invers
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Figure 9. (a)the original image.(b)
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In order to reduce to the number of
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that studying being going to be to
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Reference[10] analyzed the evolutio
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module, communication module, apper
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After the comprehensive performance
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system testing can be seen that the
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III. AUTONOMIC RESOURCE ALLOCATION
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The QoE i (T i ) is the ith user’
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nodes will be formed one cluster, t
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Where n is the number of data point
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Keyboard event Application User mod
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SQL Azure will eventually include a
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The nodes in the suffix tree are dr
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[3] Y. Li, S. M. Chung, and J. D. H
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some drilling fluid produces hydrog
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"normalization", whose membership b
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and minimum structural elements in
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esults of the spatial transform par
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B. Research on protocol actions Com
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ACKNOWLEDGMENT This work is funded
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A. Problem Description In a small b
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