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SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA90 Register descriptionsDMAC.DMAEXG0x0000c0Field <strong>Bit</strong>s Size Volatile? Synopsis TypeREQUEST_QUEUE_CLEAR_ENABLE[27:24] 4 — Request queue clear enable RWOperationWhen readWhen writtenHARD reset 0External module request queues reside inside theDMAC external glue logic. This field is used toautomatically clear the queues when the DMAtransfer is completed or stopped.0: If the enable signal from the DMAC is low (the DMAtransfer is completed or stopped), the request queueis enabled and the DMAEXG continues receiving theexternal requests.1: If the enable signal from the DMAC is low (the DMAtransfer is completed or stopped), the request queueis disabled and the DMAEXG no longer recognizesany requests.Returns current valueUpdates current value— [63:28] 36 — RESERVED RESOperationRESERVEDWhen read Returns 0When writtenHARD reset 0IgnoredTable 28: DMAC.DMAEXG registerD R A FT<strong>SuperH</strong>, Inc.<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 1: <strong>System</strong> 05-SA-10001 v1.0

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