SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATA306 Power management unit (PMU)Quick wakeupWhen an NMI or other interrupt is detected in quick wakeup standby mode clocksare soon supplied to the entire chip.1 Only when the RTC clock (32.768 kHz) is operating (see Section 6.2.2: IRLinterrupts on page 111), can deep standby mode can be exited by means of IRL3 toIRL0 (when the IRL3 to IRL0 level is higher than the SR.MASK register mask level).2 Standby mode can be exited by means of an RTC interrupt.Exit by ResetStandby mode is exited by means of a reset (power-on or manual) via either of theNOT_RESETP or NOT_RESETM pins. If the NOT_RESETP pin is used it should be heldlow until clock oscillation stabilizes. The internal clock continues to be output at theCLKOUT 1 pin.10.4.9 Clock pause functionIn deep standby mode, it is possible to stop or change the frequency of the clockinput from the EXTAL pin. This function is used as follows.1 Enter deep standby mode following the transition procedure described above.2 When standby mode is entered and the chip’s internal clock stops, a low-levelsignal is output at the STATUS1 pin, and a high-level signal at the STATUS0 pin.3 The input clock is stopped, or its frequency changed, after the STATUS1 pin goeslow and the STATUS0 pin high.4 When the frequency is changed, input an NMI or IRL interrupt after the change.When the clock is stopped, input an NMI or IRL interrupt after applying theclock.5 After the time set in the WDT, clock supply begins inside the chip, the STATUS1and STATUS0 pins both go low, and operation is resumed.D R A FT1. CLKOUT not implemented in the Eval ChipSuperH, Inc.SH-5 System Architecture, Volume 1: System 05-SA-10001 v1.0