SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATA30 SH-5 conventionsA data block is a contiguous range of data memory blocks associated with a module.These blocks are not control blocks and do not contain a VCR. Data blocks aretypically used to provide access to memory. A module may be associated with zero,one or more data blocks. The set of data blocks associated with a module must becontiguous in physical address space. Each data block is associated with exactly onemodule.All blocks which are neither control blocks nor data blocks are undefined blocks.Undefined blocks do not provide useful functionality and all accesses to undefinedblocks are errors. Packets destined for an undefined block are routed to the Debugmodule where an error is recorded.2.7.2 Control registersA control register is a memory-mapped register held in a control block. Controlregisters are 64-bit wide and allocated on addresses that are 8-byte aligned.Each control register has a unique name. Control register names are composedhierarchically by concatenating subnames, separated by a period (‘.’), together. Theleft-most subname indicates the module that implements that control register.Succeeding subnames repeatedly refine the classification of the control register. Acontrol register can be refined to a field by concatenating the control register namewith the field name separated by a period (‘.’). A field can be refined to a single bit byconcatenating the field with the bit name separated by a period (‘.’).An example control register is DEBUG.VCR. This name refers to the VCR registerwithin the DEBUG module. An example field is DEBUG.VCR.PERR_FLAGS. This namerefers to the PERR_FLAGS field within the DEBUG.VCR control register. An example bitis DEBUG.VCR.PERR_FLAGS.ERR_RCV. This name refers to the ERR_RCV bit within theDEBUG.VCR.PERR_FLAGS field.Control registers are accessed using the p-protocol. The set of transactions that aresupported by a control register depends on the implementation of that controlregister. Control registers are typically read using a whole-word LoadWordtransaction and written using a whole-word StoreWord transaction. It is possibleto have control registers that support other transactions, though these are muchless common.D R A FTEach control block is fully populated by an array of control registers. For SH-5 thereare 2 21 control registers in each control block. Typically, however, each module willonly implement a very small proportion of the available control registers.The semantics of a control register are, in general, specific to that control registerand defined by the architecture of the module that implements that control register.SuperH, Inc.SH-5 System Architecture, Volume 1: System 05-SA-10001 v1.0