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SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA160 Register descriptions7.2.15 RTC control register 1 (RTC.RCR1)RTC.RCR1 is an 8-bit readable/writable register containing a carry flag and alarmflag, plus flags to enable or disable interrupts for these flags.The CIE and AIE bits are initialized to 0 by a power-on or manual reset; the value ofbits other than CIE and AIE is undefined. In standby mode RTC.RCR1 is notinitialized, and retains its current value.RTC.RCR10x38Field <strong>Bit</strong>s Size Volatile? Synopsis TypeAF 0 1 ✓ Alarm flag RWOperationWhen readWhen writtenHARD reset 0Set to 1 when the alarm time set in those registers amongRTC.RSECAR, RTC.RMINAR, RTC.RHRAR, RTC.RWKAR, RTC.RDAYARand RTC.RMONAR in which the ENB bit is set to 1 matches therespective counter values0: Alarm registers and counter values do not match1: When alarm registers in which the ENB bit is set to 1 andcounter values match0: Clears the alarm condition1: IgnoredRESERVED [2:1] 2 - Reserved RESOperationWhen read 0When writtenHARD reset 0ReservedIgnoredD R A FTTable 70: RTC.RCR1<strong>SuperH</strong>, Inc.<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 1: <strong>System</strong> 05-SA-10001 v1.0

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