SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA310 Power management unit (PMU)Standby-power-on resetOscillation stopsResetCKIO* 1* 2SCK2STATUS Normal StandbyReset Normal0–10 Bcyc0–30 BcycNotes: 1. When standby mode is exited by means of a power-on reset, a WDT count is notperformed. Hold low for the PLL oscillation stabilization time.2. UndefinedFigure 48: STATUS output in standby power-on resetD R A FTSuperH, Inc.SH-5 System Architecture, Volume 1: System 05-SA-10001 v1.0
PRELIMINARY DATAPower management unit (PMU) 311Standby-manual resetOscillation stopsResetCKIOIn exit from sleep modeSleep-interrupt*SCK2STATUS Normal StandbyResetFigure 49: STATUS output in standby manual reset sequenceD R A FTFigure 50: STATUS output in sleep interrupt sequenceNormal0–30 0–20 BcycBcycNote: * When standby mode is exited by means of a manual reset, a WDT count is not performed.Hold low for the PLL oscillation stabilization time.CKIOInterrupt requestSTATUS Normal Sleep Normal05-SA-10001 v1.0SuperH, Inc.SH-5 System Architecture, Volume 1: System
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PRELIMINARY DATASuperH TM (SH)64-Bi
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PRELIMINARY DATAContentsPrefacexi1
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PRELIMINARY DATAv3 SH-5 CPU 533.1 I
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PRELIMINARY DATAvii6.2 Interrupt so
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PRELIMINARY DATAix8.5 Usage notes 1
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PRELIMINARY DATAxi10.6 Reset contro
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PRELIMINARY DATAPrefaceThis documen
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PRELIMINARY DATAOverview1.1 Introdu
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PRELIMINARY DATAIntroduction 3DM_CL
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PRELIMINARY DATADebug architecture
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PRELIMINARY DATADebug architecture
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PRELIMINARY DATASystemorganization2
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PRELIMINARY DATASuperHyway architec
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PRELIMINARY DATACache coherency sup
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PRELIMINARY DATAOther features 212.
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PRELIMINARY DATASH-5 SuperHyway imp
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PRELIMINARY DATASH-5 SuperHyway imp
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PRELIMINARY DATASH-5 physical addre
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PRELIMINARY DATASH-5 conventions 29
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PRELIMINARY DATASH-5 endianess and
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PRELIMINARY DATASH-5 endianess and
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PRELIMINARY DATASH-5 undefined beha
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PRELIMINARY DATASH-5 CPU3.1 Introdu
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PRELIMINARY DATAMemory mapped regis
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PRELIMINARY DATAMemory mapped regis
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PRELIMINARY DATADMAcontrollerD R A
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PRELIMINARY DATAOperation 654.3 Ope
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PRELIMINARY DATAOperation 67In the
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PRELIMINARY DATAOperation 69On-Chip
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PRELIMINARY DATAOperation 71Before
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PRELIMINARY DATARegister descriptio
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PRELIMINARY DATADMAC SuperHyway tra
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PRELIMINARY DATAPeripheralbridge5.1
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PRELIMINARY DATAFunctionality 955.2
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PRELIMINARY DATAOperation 975.3.3 P
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PRELIMINARY DATAOperation 99Ports 5
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PRELIMINARY DATAOperation 101PERIPH
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PRELIMINARY DATAOperation 103The se
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PRELIMINARY DATAOperation 105PERIPH
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PRELIMINARY DATAInterruptcontroller
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PRELIMINARY DATAFeatures 1096.1.2 P
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PRELIMINARY DATAInterrupt sources 1
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PRELIMINARY DATAInterrupt sources 1
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PRELIMINARY DATAInterrupt exception
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PRELIMINARY DATAInterrupt exception
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PRELIMINARY DATAReal-timeclock (RTC
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PRELIMINARY DATAOverview 1397.1.3 P
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PRELIMINARY DATAOperation 167flag s
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PRELIMINARY DATAInterrupts 1697.4 I
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PRELIMINARY DATATimer unit(TMU)8.1
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PRELIMINARY DATAOverview 1738.1.3 P
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PRELIMINARY DATAOperation 1873 When
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PRELIMINARY DATAOperation 189• Op
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PRELIMINARY DATAInterrupts 1918.4 I
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PRELIMINARY DATASerial commsinterfa
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PRELIMINARY DATAOverview 1959.1.2 B
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PRELIMINARY DATAOperation 241Bit 0
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PRELIMINARY DATAOperation 243SCIF.S
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PRELIMINARY DATAOperation 245ClockE
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PRELIMINARY DATAOperation 247Serial
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PRELIMINARY DATAOperation 2491Seria
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PRELIMINARY DATAOperation 251NoNoNo
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PRELIMINARY DATAOperation 2531Seria
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PRELIMINARY DATAPower down 255Inter
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PRELIMINARY DATAUsage notes 257Send
Page 273 and 274: PRELIMINARY DATAClock, powerand res
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Page 293 and 294: PRELIMINARY DATAWatchdog timer 2791
Page 295 and 296: PRELIMINARY DATAWatchdog timer 281C
Page 297 and 298: PRELIMINARY DATAWatchdog timer 283C
Page 299 and 300: PRELIMINARY DATAWatchdog timer 285N
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Page 327 and 328: PRELIMINARY DATADebug and power man
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Page 337 and 338: PRELIMINARY DATAIndexAAddress 1-2,
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Page 341 and 342: PRELIMINARY DATA327Physical memory
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