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SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATAInterrupts 1918.4 InterruptsThere are four TMU interrupt sources, comprising underflow interrupts and theinput capture interrupt (when the input capture function is used). Underflowinterrupts are generated on channels 0 to 2, and input capture interrupts onchannel 2 only.An underflow interrupt request is generated (for each channel) according to the ANDof UNF and the interrupt enable bit (UNIE) in TCR.When the input capture function is used and an input capture request is generated,an interrupt is requested if the input capture input flag (ICPF) in TMU.TCR2 is 1 andthe input capture control bits (ICPE1, ICPE0) in TMU.TCR2 are 11.The TMU interrupt sources are summarized in Table 82.Channel Interrupt source Description Priority0 TUNI0 Underflow interrupt 0 High1 TUNI1 Underflow interrupt 1 ↑2 TUNI2 Underflow interrupt 2 ↓TICPI2 Input capture interrupt 2 LowTable 82: TMU interrupt sourcesD R A FT05-SA-10001 v1.0<strong>SuperH</strong>, Inc.<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 1: <strong>System</strong>

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