SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATAClock pulse generator (CPG) 269CPRC.FRQ - Frequency control register0x0000Field Bits Size Volatile? Synopsis TypePLL2EN 9 1 - PLL Circuit 2 Enable a RWOperationWhen readWhen writtenHARD reset 1Specifies whether PLL2 is on or off.Returns current value0: PLL2 is not used1: PLL2 is usedPLL1EN 10 1 - PLL circuit 1 enable RWOperationWhen readWhen writtenHARD reset 1Specifies whether PLL1 is used.Returns current value0: PLL1 is not used1: PLL1 is usedCKOEN 11 1 - Clock output enable b RWOperationWhen readWhen writtenHARD reset 1Specifies whether a clock is output from the CLKOUT pin orthe CLKOUT pin has been put in the high impedance state.When the CLKOUT pin goes to the high impedance state,operation continues at the frequency prior to this state beingentered. When the CLKOUT pin becomes high impedance itis pulled up.Returns current valueD R A FT0: CLKOUT pin goes to the high impedance state1: Clock is output from the CLKOUT pinTable 105: The FRQ CONTROL register05-SA-10001 v1.0SuperH, Inc.SH-5 System Architecture, Volume 1: System