SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATARegister descriptions 225SCIF.SCFCR20x18Field Bits Size Volatile? Synopsis TypeTTRG1,TTRG0RTRG1,RTRG0RSTRG2,RSTRG1,RSTRG0[5:4] 2 - Transmit FIFO data number triggers RWOperationWhen readWhen writtenHARD reset 0Sets the number of remaining transmit data bytes that setsthe transmit FIFO data register empty (TDFE) flag. See Bits 5and 4 - Transmit FIFO data number trigger (TTRG1, TTRG0)on page 227.Returns current valueUpdates current value[7:6] 2 - Receive FIFO data number triggers RWOperationWhen readWhen writtenHARD reset 0Sets the number of receive data bytes that sets the receivedata full (RDF) flag. See Bits 7 and 6 - Receive FIFO datanumber trigger (RTRG1, RTRG0) on page 227.Returns current valueUpdates current value[10:8] 3 - RTS2 output active trigger ROOperationWhen readWhen writtenHARD reset 0Sets the number of receive data bytes that sets the RTS2signal active. See Bits 10, 9 and 8 - RTS2 output activetrigger (RSTRG2, RSTRG1 and RSTRG0) on page 226.Returns current valueUpdates current valueD R A FTTable 92: SCIF.SCFCR205-SA-10001 v1.0SuperH, Inc.SH-5 System Architecture, Volume 1: System