SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATA156 Register descriptionsRTC.RWKAR0x2CField Bits Size Volatile? Synopsis TypeENB 7 1 - Comparison enable bit RWOperationWhen readWhen writtenHARD reset 07.2.13 Day alarm register (RTC.RDAYAR)Set this bit to ‘1’ to enable Day of week comparison for alarmReturns current valueUpdates current valueTable 67: RTC.RWKARRTC.RDAYAR is an 8-bit readable/writable register used as an alarm register for theRTC’s BCD-coded day value counter, RTC.RDAYCNT. When the ENB bit is set to 1, theRTC.RDAYAR value is compared with the RTC.RDAYCNT value. Comparison betweenthe counter and the alarm register is performed for those registers amongRTC.RSECAR, RTC.RMINAR, RTC.RHRAR, RTC.RWKAR, RTC.RDAYAR and RTC.RMONAR inwhich the ENB bit is set to 1, and the RTC.RCR1 alarm flag is set when the respectivevalues all match.The setting range is decimal 01 to 31 + ENB bit. The RTC will not operate normallyif any other value is set. The setting range for RTC.RDAYAR depends on the monthand whether the year is a leap year, so care is required when making the setting.The ENB bit in RTC.RDAYAR is initialized by a power-on reset. The other fields inRTC.RDAYAR are not initialized by a power-on or manual reset, or in standby mode.Bit 6 is always read as 0. A write to this bit is invalid, but the write value shouldalways be 0.D R A FTSuperH, Inc.SH-5 System Architecture, Volume 1: System 05-SA-10001 v1.0