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SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA236 Register descriptions<strong>Bit</strong> 1 - Serial port break I/O (SPB2IO)Specifies the serial port TxD2 pin output condition. When the TxD2 pin is actually setas a port output pin and outputs the value set by the SPB2DT bit, the TE bit inSCIF.SCSCR2 should be cleared to 0.<strong>Bit</strong> 1: SPB2IO<strong>Bit</strong> 0 - Serial port break data (SPB2DT)Description0 SPB2DT bit value is not output to the TxD2 pin(Initial value)1 SPB2DT bit value is output to the TxD2 pinSpecifies the serial port RxD2 pin input data and TxD2 pin output data. The TxD2 pinoutput condition is specified by the SPB2IO bit (see <strong>Bit</strong> 1 - Serial port break I/O(SPB2IO) for details). When the TxD2 pin is designated as an output, the value of theSPB2DT bit is output to the TxD2 pin. The RxD2 pin value is read from the SPB2DT bitregardless of the value of the SPB2IO bit. The initial value of this bit after a power-onreset or manual reset is undefined.<strong>Bit</strong> 0: SPB2DT0 Input/output data is low-level1 Input/output data is high-levelDescriptionSCIF I/O port block diagrams are shown Figure 27 in to Figure 30.D R A FT<strong>SuperH</strong>, Inc.<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 1: <strong>System</strong> 05-SA-10001 v1.0

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