12.07.2015 Views

SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

PRELIMINARY DATAOperation 975.3.3 PP-Bus areaOperations to the PP-Bus area are mapped onto one of a number of possiblesubregions. There are 17 subregions are currently defined, the first 16 allocating a<strong>64</strong> Kbytes area of memory, and the 17th allocates a 16 Mbyte region of memory.Each subregion is pre-decoded by the peripheral bridge and it’s own associatedsignal set, as follows:• padrerr_xxx_n 1• pms_xxx_n• pdouble_xxx_n• pwait_xxx_nThese are used to determined if an access to that address and region is valid, theaccess width to that module and the number of cycles required to access thatmodule.If the PP-Bus peripheral signals an address error, an error is returned to the<strong>SuperH</strong>yway, and the bit BAD_ADDR is asserted in the VCR register.The peripheral bridge supports the following PP-Bus operations:• read/write byte,• read/write double byte,• read/write four byte.The mapping between <strong>SuperH</strong>yway operations and the PP-Bus is shown inTable 31.D R A FT1. xxx corresponds to the module name or number. These signals are active low.05-SA-10001 v1.0<strong>SuperH</strong>, Inc.<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 1: <strong>System</strong>

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!