12.07.2015 Views

SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

PRELIMINARY DATAInterrupts 1697.4 InterruptsThere are three kinds of RTC interrupt: alarm interrupts, periodic interrupts, andcarry interrupts.An alarm interrupt request (ATI) is generated when the alarm flag (AF) in RTC.RCR1is set to 1 while the alarm interrupt enable bit (AIE) is also set to 1.A periodic interrupt request (PRI) is generated when the periodic interrupt enablebits (PES2 to PES0) in RTC.RCR2 are set to a value other than 000 and the periodicinterrupt flag (PEF) is set to 1.A carry interrupt request (CUI) is generated when the carry flag (CF) in RTC.RCR1 isset to 1 while the carry interrupt enable bit (CIE) is also set to 1.7.5 Usage notes7.5.1 Register initializationAfter powering on and making the RTC.RCR1 register settings, reset the frequencydivider (by setting RTC.RCR2.RESET to 1) and make initial settings for all the otherregisters.7.5.2 Crystal oscillator circuitCrystal oscillator circuit constants (recommended values) are shown in Table 72,and the RTC crystal oscillator circuit in Figure 18.f osc C in C out32.768 kHz 10-22 pF 10-22 pFD R A FTTable 72: Crystal oscillator circuit constants (recommended values)05-SA-10001 v1.0<strong>SuperH</strong>, Inc.<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 1: <strong>System</strong>

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!