SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATA212 Register descriptionsSCIF.SCFSR20X10Field Bits Size Volatile? Synopsis TypeFER [3] 1 Framing error ROOperationWhen readWhen writtenHARD reset 0Indicates a framing error in the data read fromSCIF.SCFRDR2.See Bit 3 - Framing error (FER) on page 218.Returns current valueInvalidBRK [4] 1 Break detect RW *OperationWhen readWhen writtenHARD reset 0Indicates that a receive data break signal has beendetected.Bit 4 - Break detect (BRK) on page 218Returns current value* Only 0 can be written. This clears the flagTDFE [5] 1 Transmit FIFO data empty RW *OperationWhen readWhen writtenHARD reset 1Indicates that data has been transferred from SCIF.SCFTDR2 toSCIF.SCTSR2, the number of data bytes in SCIF.SCFTDR2 hasfallen to or below the transmit trigger data number set by bitsTTRG1 and TTRG0 in the FIFO control register (SCIF.SCFCR2),and new transmit data can be written to SCIF.SCFTDR2. See Bit5 - Transmit FIFO data empty (TDFE) on page 217Returns current value* Only 0 can be written. This clears the flagD R A FTTable 89: SCIF.SCFSR2SuperH, Inc.SH-5 System Architecture, Volume 1: System 05-SA-10001 v1.0