SuperH (SH) 64-Bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA322 Reset controllerD R A FTSuperH, Inc.SH-5 System Architecture, Volume 1: System 05-SA-10001 v1.0
PRELIMINARY DATAIndexAAddress 1-2, 4-6, 13, 16-20, 22-26, 29-31,34-35, 41-42, 48, 54-57, 59, 64-66,79-81, 83-84, 86, 94-97, 99, 173,196-197, 290, 321Address map 22, 26, 58, 139, 173,196-197, 264, 267Address_align_error 68, 86Address_alignment_error 79Af 160Aie 161Alarm 2, 137, 140, 151-161, 168-169Alarm interrupts 137, 169Aligned 18-20, 30, 41, 56, 285AND 191Architectural state 41Attributes 87Auto request 69, 84BBAD_ADDR 96-97, 99Bad_addr 38, 61, 75, 101Bad_dest 40BAD_OPC 96, 98Bad_opc 40, 62, 76, 102BFC 266, 268, 277-278BL 114Boot-strap 29BOT_MB 36Bot_mb 34-36, 41, 60, 74, 100Break 194, 196, 205, 208-209, 212, 218,231, 236, 242, 252, 254-257Bridge State 95BRK 208-210, 212, 218, 252, 254-255Bus Analyzer 316Byte 97CCache 1, 17-21, 53-58, 303Coherency 19-20, 55, 57Carry interrupt 137, 161, 168-169Cf 162Channel 4, 63-70, 77-86, 171-172, 176,178-180, 182, 185-186, 189, 191-192Character 193, 201, 203, 213, 216,241-242CHR 201-202, 242Cie 161CKE 205, 210, 241, 245CKEG 180, 182-183, 185-186, 189-190CKS 200, 204, 221, 223, 276, 282,285-287, 304D R A FT05-SA-10001 v1.0SuperH, Inc.SH-5 System Architecture, Volume 1: System
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PRELIMINARY DATASuperH TM (SH)64-Bi
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PRELIMINARY DATAContentsPrefacexi1
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PRELIMINARY DATAv3 SH-5 CPU 533.1 I
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PRELIMINARY DATAvii6.2 Interrupt so
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PRELIMINARY DATAix8.5 Usage notes 1
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PRELIMINARY DATAxi10.6 Reset contro
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PRELIMINARY DATAPrefaceThis documen
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PRELIMINARY DATAOverview1.1 Introdu
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PRELIMINARY DATAIntroduction 3DM_CL
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PRELIMINARY DATADebug architecture
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PRELIMINARY DATADebug architecture
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PRELIMINARY DATASystemorganization2
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PRELIMINARY DATASuperHyway architec
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PRELIMINARY DATACache coherency sup
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PRELIMINARY DATAOther features 212.
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PRELIMINARY DATASH-5 SuperHyway imp
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PRELIMINARY DATASH-5 SuperHyway imp
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PRELIMINARY DATASH-5 physical addre
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PRELIMINARY DATASH-5 conventions 29
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PRELIMINARY DATASH-5 endianess and
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PRELIMINARY DATASH-5 endianess and
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PRELIMINARY DATASH-5 undefined beha
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PRELIMINARY DATASH-5 CPU3.1 Introdu
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PRELIMINARY DATAMemory mapped regis
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PRELIMINARY DATAMemory mapped regis
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PRELIMINARY DATADMAcontrollerD R A
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PRELIMINARY DATAOperation 654.3 Ope
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PRELIMINARY DATAOperation 67In the
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PRELIMINARY DATAOperation 69On-Chip
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PRELIMINARY DATAOperation 71Before
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PRELIMINARY DATARegister descriptio
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PRELIMINARY DATADMAC SuperHyway tra
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PRELIMINARY DATAPeripheralbridge5.1
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PRELIMINARY DATAFunctionality 955.2
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PRELIMINARY DATAOperation 975.3.3 P
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PRELIMINARY DATAOperation 99Ports 5
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PRELIMINARY DATAOperation 101PERIPH
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PRELIMINARY DATAOperation 103The se
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PRELIMINARY DATAOperation 105PERIPH
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PRELIMINARY DATAInterruptcontroller
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PRELIMINARY DATAFeatures 1096.1.2 P
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PRELIMINARY DATAInterrupt sources 1
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PRELIMINARY DATAInterrupt sources 1
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PRELIMINARY DATAInterrupt exception
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PRELIMINARY DATAInterrupt exception
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PRELIMINARY DATAReal-timeclock (RTC
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PRELIMINARY DATAOverview 1397.1.3 P
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PRELIMINARY DATAOperation 167flag s
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PRELIMINARY DATAInterrupts 1697.4 I
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PRELIMINARY DATATimer unit(TMU)8.1
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PRELIMINARY DATAOverview 1738.1.3 P
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PRELIMINARY DATAOperation 1873 When
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PRELIMINARY DATAOperation 189• Op
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PRELIMINARY DATAInterrupts 1918.4 I
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PRELIMINARY DATASerial commsinterfa
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PRELIMINARY DATAOverview 1959.1.2 B
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PRELIMINARY DATAOperation 241Bit 0
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PRELIMINARY DATAOperation 243SCIF.S
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PRELIMINARY DATAOperation 245ClockE
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PRELIMINARY DATAOperation 247Serial
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PRELIMINARY DATAOperation 2491Seria
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PRELIMINARY DATAOperation 251NoNoNo
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PRELIMINARY DATAOperation 2531Seria
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PRELIMINARY DATAPower down 255Inter
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PRELIMINARY DATAUsage notes 257Send
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PRELIMINARY DATAClock, powerand res
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PRELIMINARY DATAClock pulse generat
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Page 285 and 286: PRELIMINARY DATAClock pulse generat
Page 293 and 294: PRELIMINARY DATAWatchdog timer 2791
Page 295 and 296: PRELIMINARY DATAWatchdog timer 281C
Page 297 and 298: PRELIMINARY DATAWatchdog timer 283C
Page 299 and 300: PRELIMINARY DATAWatchdog timer 285N
Page 301 and 302: PRELIMINARY DATAPower management un
Page 327 and 328: PRELIMINARY DATADebug and power man
Page 329 and 330: PRELIMINARY DATADebug and power man
Page 331 and 332: PRELIMINARY DATAReset controller 31
Page 333 and 334: PRELIMINARY DATAReset controller 31
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Page 339 and 340: PRELIMINARY DATA325Endian 43, 58Bi-
Page 341 and 342: PRELIMINARY DATA327Physical memory
Page 343 and 344: PRELIMINARY DATA329StoreWord 30, 61
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