9600 Service Manual - gmecorp-usa.com

Interlocks / Stator 3
GENERATOR INTERLOCK
OVERVIEW
The interlock circuit provides a means to halt system operation through software when the
Technique Processor detects a major system fault or through hardware when a FAST
STOP switch is pressed.
The FAST STOP switches are located on either side of the control panel housing. The
message, INTERLOCKS OPEN, will appear on both control panel displays when either
FAST STOP switch is pressed. This is considered a fatal error and is recorded in the
EVENT.DAT file. The system is still powered at this time and a system re-boot can be
commanded by pressing any key on the control panel.
The interlock circuit is comprised of the following circuits:
CPU INTERLOCK
• CPU INTERLOCK
• FAST STOP
• +24V INTERLOCK
• JUMPER E5 / RELAY K4
During the boot sequence the Technique Processor software toggles PIO U27-25, on the
Analog Interface PCB, at a 10 mS rate. Eighteen arrows are displayed on the Control
Panel display at the point in the boot sequence that this occurs.
This 10 mS interlock pulse is detected by pulse detector Q1, Q2 and associated circuitry
on the Analog Interface PCB. As long as the interlock pulses are present, the pulse
detector holds relay K1 energized. This allows +15 VDC to pass through relay K1
contacts 1 & 7 illuminating LED DS1 on the Analog Interface PCB. DS1 indicates that the
signal CPU INTERLOCK (+15V) is present.
The CPU INTERLOCK signal passes through the Motherboard to the Power Motor Relay
PCB where it can be measured on TP3. CPU INTERLOCK momentarily energizes relay
K8 on the Power Motor Relay PCB through the C7/R17 circuit. The CPU INTERLOCK
signal also passes through to the FAST STOP circuit described next.