~ National ~ Semiconductor - Al Kossow's Bitsavers

SUPPORTING DOCUMENTS
The following references can be used to obtain further information.
- DP8390N-1 Data Sheet
- Advanced Peripherals IEEE 802.3 Local Area Network
Guide
- DP8390 Data Sheet Addendum, Sept. 1987
- IEEE 802.3 1 Base5 ("StarLAN")
- 82C550A Data Sheet (a product of Chips and Technology
Inc.)
- MK5035N Data Sheet (a product of Mostek Corporation)
- PT3589 pulse transformer Data Sheet (a product of
VALOR Electronics)
- BH500-1436 pulse transformer Data Sheet (a product of
BH Electronics)
- NP5413 pulse transformer Data Sheet (a product of
Nano Pulse Inc.)
CONSIDERATIONS FOR USING REV. C DP8390N·1
(1) In order for the 4-byte packet header to be properly written
by the DP8390, the DMA clock to Network clock may
not be greater than 4:1; thus, in StarLAN applications, the
DMA clock may not exceed 4 MHz.
Higher bus clock speeds (up to 8 MHz), however, can be
achieved by manipulating the packet header under software
control. If you are using a DMA clock which is greater than
4 MHz, the DP8390 occasionally copies the Lower Byte
Count into the header twice, and fails to write the Upper
Byte Count. The Upper byte count, however, may be calculated
by subtracting the Next Page Pointer (second byte in
the header) with the Next Page Pointer of the previous
packet. See DP8390 Datasheet Addendum section 3.1.
(2) Due to the asynchronous nature between the local and
remote DMAs, a race condition exists which may cause the
local DMA to use the remote DMA's address counter or vice
versa. This problem is fixed using a DMA clock synchronous
to the transmit clock of the encoder, or a clock derived from
the transmit clock.
(3) Because of problem (1) above, the "send packet" command
will not operate at bus clock frequencies above
4 MHz. Instead, use the Remote Read DMA and update
BNDRY under software control. Note that there is a special
consideration for updating BNDRY as specified in section
3.0 of the DP8390 Data Sheet Addendum. BNDRY must
always be kept at least one 256-byte buffer behind the
CURR pointer.
(4) Rev. C parts will be marked as DP8390N-1 and will oper·
ate at a maximum bus clock of 8 MHz.
DAUGHTER CARD PARTS LIST
Resistors
Capacitors
Inductors
1200 (R3) 1
5600 (R4) 1
2.2 KO (R1, 2) 2
10 MO (R7 or R8) 1
30pF (C3) 1
15 pF (C7, 8 or 15,16) 2
0.1 ,..F (C1 , 2) 2
35,..F (C11) 1
40,..H (L1)
DAUGHTER CARD PARTS LIST (Continued)
Crystal
8 MHz (for MK5035N)
NDKAT-51
16 MHz (for 82C550A)
NDKAT-51
ICs and Other
DS8923 (U2)
MM74HC74 (U1)
MM74HC04 (U7)
Manchester ENDECs
82C550A (U6)
MK5035N
Pulse Transformers
PT3589
NP5413
BH500-1436
LIST OF OTHER MANUFACTURERS
MANCHESTER ENCODER/DECODERS
82C550A
Chips and Technologies
Ken Buntaran, Technical Marketing Engineer
521 Cottonwood Drive
Milpitas, CA 95035
(408) 434-0600
MK5035N
Mostek Corporation
1310 Electronics Drive
Carrollton, TX 75006
(214) 466-6000
PULSE TRANSFORMERS
BH Electronics
John DeCramer, Engineering Manager
604 Michigan Road
Marshall, MN 56258
(507) 532-3211
Nano Pulse Industries, Inc.
440 Nibus Street
P.O. Box 9398
Brea, CA 92621
(714) 529-2600
Pulse Engineering, Inc.
Rey Bautista, DeSign Engineer
7250 Convoy Court
San Diego, CA 92111
(619) 268-2449
VALOR Electronics, Inc.
Ernest R. Jensen, Product Development
6750 Nancy Ridge Drive
San Diego, CA 92121
(619) 458-1471
PHONE JACK
Nova-Tronic, Inc.
Jeff Hines, Sales Manager
4701 Patrick Henry Drive #24
Santa Clara, CA 95054
(408) 727·9530
CRYSTALS
NDK·America
20300 Stevens Creek Blvd.
Cupertino, CA 95014
(408) 255-0831
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