~ National ~ Semiconductor - Al Kossow's Bitsavers

3.0 Pin Descriptions (Continued)
Signal I/O Pin
Reset
State
DATA MEMORY INTERFACE (Continued)
Timing/Control:
Description
ALE 0 28 0 Address latch Enable. Demultiplexes AD bus. Address should be latched on the
falling edge.
READ 0 29 I Data memory READ strobe. Data is latched on the rising edge.
WRITE 0 30 I Data memory WRITE strobe. Data is presented on the rising edge.
TRANSCEIVER INTERFACE
DATA-IN I 39 X logic level serial DATA INput.
AlG-IN+ I 42 X Non-inverting AnaloG INput for biphase serial data.
AlG-IN- I 41 X Inverting AnaloG INput for biphase serial data.
DATA-OUT 0 38 I Biphase serial DATA OUTput (inverted).
DATA-DlY 0 37 0 Biphase serial DATA output DelaYed by one-quarter bit time.
TX-ACT 0 36 0 Transmitter ACTive. Normally low, goes high to indicate serial data is being
transmitted. Used to enable external line drive circuitry.
REMOTE INTERFACE
RAE I 46 X Remote Access Enable. A "chip-select" input to allow host access of BCP
functions and memory.
CMD I 45 X CoMmanD input. When high, remote accesses are directed to the Remote
Interface Configuration (RIC l register. When low, remote accesses are directed
to data-memory, instruction-memory or program counter as determined by
(RICl.
REM-RD I 47 X REMote ReaD. When active along with RAE, a remote read cycle is requested;
serviced by the BCP when the data bus becomes available.
REM-WR I 48 X REMote WRite. When active along with RAE, a remote write cycle is requested;
serviced by the BCP when the data bus becomes available.
XACK 0 50 I Transfer ACKnowledge. Normally high, goes low on REM-RD (or REM-WR going
low if RAE low) and returns high when the transfer is complete. Normally used as
a "wait" signal to the remote processor.
WR-PEND 0 49 I WRite PENDing. In a system configuration where remote write cycles are
latched, indicates when the latches contain valid data which is yet to be serviced
by the BCP.
lOCK I 44 X The remote processor uses this input to lOCK out local (BCP) accesses to datamemory.
Once the remote processor has been granted the bus, lOCK gives it
sole access to the bus and BCP accesses are "waited".
lCl 0 31 0 loCal. Normally low goes high when the BCP relinquishes the data and address
bus to service a Remote Access.
EXTERNAL INTERRUPTS
BIRQ I/O 53 I Bi-directionallnterrupt ReQuest. As an input, can be used as an active low
interrupt input (maskable and level-sensitive). As an output, can be used to
generate remote system interrupts, reset via (RIC l.
NMI I 52 X Non-Maskable Interrupt. Negative edge sensitive interrupt input.
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