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» z I U'I Q 01:00 INSTRUCTION ADDRESS 1(0:1&) INSTRUCTION BUS 74AlS373 10 H) 11~~~~~~12D 20 5D 50 6D 6Q 70 70 80 80 C 3D 30' 40 4Q DC A7 A 8:15 0:7 A 0:7 E:PAO FIGURE 3. Schematic TLlF/9403-3 2-193
...,. o II) z • c( IWR IA{O:IS) INSTRUCTION ADDRESS INSTRUCTION MEMORY INSTRUCTION BUS ~12 2 A12 IAII 23 All ~10 21 AID IA. 24 A. ~. 5 IA7 , A8 A7 RAN D7 ~6 A6 8KX8 06 lAS 5 AS 45n5 05 ~. 6 IA> 7 A4 D. IA2 A' 03 IAI 02 lAD 10 • 01 AD " DD ONO 14 MB81C78A-45 PKG n-28PW02 1(0,15) ,\(.,15) A 0:7 0:7 ADDRESS HIGH ADDRESS lOW DATA MULTIPLEXED DATA toIEMORY PERIPHERALS (UARTS. DIGITAL I/O. AND/OR ANALOG I/O) = =J:=:::!lt::!j CE A131111~1 Nl.iC27CP128 VPP A14 27 vee Of. A12 lAID [PROM All 16KX8 AID 350n5 :: 07 1t7 06 A6 05 A5 04 A4 03 A3 02 A2 01 AI 00 AD FIGURE 3. Schematic (Continued) TL/F/9403-4 2-194
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~ National ~ Semiconductor 400014 R
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TRADEMARKS Following is the most cu
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II) c ~ ~National ~ ~ Semiconductor
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Table of Contents (Continued) Secti
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Alpha-Numeric Index(continUed) DS36
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Section 1 Local Area Networks IEEE
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~National ~ Semiconductor DP8390C/N
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3.0 Functional Description (Continu
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5.0 Pin Descriptions (Continued) BU
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6.0 Direct Memory Access Control (D
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7.0 Packet Reception (Continued) Re
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8.0 Packet Transmission (Continued)
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10.0 Internal Registers (Continued)
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.----------------------------------
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12.0 Loopback Diagnostics (Continue
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13.0 Bus Arbitration and Timing The
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13.0 Bus Arbitration and Timing (Co
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15.0 Switching Characteristics AC S
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15.0 Switching Characteristics (Con
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AC Timing Test Conditions Input Pul
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2.0 Block Diagram COL CRS PROTOCOL
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4.0 Transmit/Receive Packet Encapsu
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5.0 Pin Descriptions (Continued) BU
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7.0 Packet Reception (Continued) fo
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7.0 Packet Reception (Continued) Er
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9.0 Remote DMA The Remote DMA chann
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11.0 Initialization Procedures (Con
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13.0 Bus Arbitration and Timing The
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-----------------------------------
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15.0 Switching Characteristics AC S
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-----------------------------------
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AC Timing Test Conditions Input Pul
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2.0 Block Diagram TRANSCEIVER CABLE
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PCC Connection Diagram 39.0. 39.0.
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6.0 Absolute Maximum Ratings Recomm
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9.0 Timing and Load Diagrams (Conti
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2.0 Block Diagram COAX CABLE r ____
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~~L ~------------------------------
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6.0 Absolute Maximum Ratings (Note
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I: • • • • • • Interrup
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PAL20LB Decode and DMA Interface Lo
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~ U16/8 R1 R1,R2=4.7k.o. Note: For
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Although Cheapernet is intended for
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The transmitted packet from the SNI
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Truth Table for Various Collision D
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CHEAPERNET APPLICATION WITH THE DP8
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DP8390 Network Interface Controller
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ping between the received address a
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If the current local DMA address ev
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6.2 Dual Port Memory One popular me
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StarLAN With The DP839EB Evaluation
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SUPPORTING DOCUMENTS The following
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Pulse Transformer U3 .----. j " "P>
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ELECTROSTATIC DISCHARGE TEST (ESD)
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Section 2 Contents DP8340INS32440 I
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.. 0 C'I C") en .... z 0 C") GO Go
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~ 'OIl' N CO) (J) Z .... o 'OIl' CO
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Timing Characteristics Oscillator F
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Timing Waveforms (Continued) TA REG
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.. ... ~ ~National ~ ~ Semiconduc
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Detailed Functional Pin Description
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Message Format (Continued) DATA REC
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Timing Characteristics (Notes 2, 6,
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Timing Waveforms (Continued) 4T±(T
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Typical Applications (Continued) +5
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N r--------------------------------
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~ ..,. r---------------------------
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Timing Characteristics (Continued)
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Functional Timing Waveforms (Contin
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Typical Applications (Continued) DA
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C") "Ot "Ot N C") en ...... z C") "
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) r--------------------------------
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Absolute Maximum Ratings (Note 1) I
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(W) r------------------------------
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M r--------------------------------
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MUX~ __________________ The BIPLAN
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U) ,-------------------------------
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~r---------------------------------
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~ .--------------------------------
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An EPROM implementation was selecte
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MASTER MUL TIPLEXING/DE-MUL TIPLEXI
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AN·496 '" 0, '" (U17/ (U23/6) TO 5
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AN-496 t W19 ~ J2-43 I' [; 0 J2-42
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AN·496
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DP8342/DP8343 HIGH SPEED INTERFACE
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2.0 Connection Diagram A13- 12 A12-
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3.0 Pin Descriptions (Continued) Si
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~ ~ 4.0 Electrical Specifications (
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4.0 Electrical Specifications (Cont
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~ ~ 4.0 Electrical Specifications (
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c( '
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~L ______________ ___ ~ ~ 4.0 Elect
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5.0 Instruction Set Overview (Conti
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6.0 Instruction Set Reference (Cont
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~ ,--------------------------------
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~ C') 6.0 Instruction Set Reference
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! 6.0 Instruction Set Reference (Co
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~ ~ 6.0 Instruction Set Reference (
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== ~ 6.0 Instruction Set Reference
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7.0 CPU Registers (Continued) BIT I
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7.0 CPU Registers (Continued) BIRO
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7.0 CPU Registers (Continued) 76543
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7.0 CPU Registers (Continued) BIT D
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7.0 CPU Registers (Continued) BIT D
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Page 320 and 321: ~ ~ HASM state TCU state eLK-OUT RE
Page 322 and 323: ~I tn tn ...._,__'RS A RS, RSC IMEM
Page 326 and 327: ~ 01 CO RASM stat. TCU stat. CLK-OU
Page 328 and 329: ~ ~ I\~"'''' I 'ow = "[OW2-0) , RS
Page 332 and 333: ~ 8l HASM stat. TCU stat. CU- C» b
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Page 336 and 337: 10.0 Transceiver (Continued) (a) 32
Page 338 and 339: 10.0 Transceiver (Continued) TABLE
Page 340 and 341: 10.0 Transceiver (Continued) dotted
Page 342 and 343: 10.0 Transceiver (Continued) TABLE
Page 344 and 345: 10.0 Transceiver (Continued) {also
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Page 348 and 349: Decoding Bit Fields with the JRMK I
Page 350 and 351: Receiver Interrupts/Flags for the D
Page 352 and 353: ****************DA ISR*************
Page 354 and 355: "Interrupts"-A Powerful Tool of the
Page 356 and 357: TABLE II. (lCR) Interrupt Mask Bits
Page 358 and 359: Running the DP8344 with wait states
Page 362 and 363: WHY EPROM SOFT-LOAD? In a stand-alo
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Page 366 and 367: RESET ~. Timing at Beginning of Ins
Page 368 and 369: .. I CRYSTAL ~~~.~ I UP TO 64K OP83
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Page 374 and 375: The roll-off frequency, Fro, should
Page 376 and 377: ceives messages whose first frame a
Page 378 and 379: RECEIVER INTERRUPT The receiver int
Page 380 and 381: JMP n LJMP n JMPR Rs JMPI Ptr JRMK
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Page 386 and 387: 00044 F90a :J- 226 Z • 227 MOVE A
Page 388 and 389: l> Z 00074 80BD 2'18 en • 00075 0
Page 390 and 391: Section 3 ISDN Components
Page 392 and 393: Introduction To National Semiconduc
Page 394 and 395: NSC Solutions for Layers 2 and 3 Na
Page 396 and 397: NSC Solutions: Systems Level Basic
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Page 400 and 401: ~National ~ Semiconductor PRELIMINA
Page 402 and 403: ISDN DEFINITIONS "B" Channel, or DS
Page 404: ~ '" TE2 UP TO 8 TERMINALS -
Page 407 and 408: Section 4 Contents INS8250/INS8250-
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3.0 AC Electrical Characteristics T
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. ID
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5.0 Block Diagram INTERNAL DATA IUS
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6.0 Pin Descriptions (Continued) In
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8.0 Registers (Continued) and 1, on
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8.0 Registers (Continued) 8.5 INTER
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m r--------------------------------
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~ &I) o N m Z ::::: o &I) 'Of' o co
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~ Lt) o N co U) Z ::::: o Lt) '
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4.0 Timing Waveforms (Continued) Re
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6.0 Pin Descriptions (Continued) Re
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8.0 Registers The system programmer
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8.0 Registers (Continued) 8.3 PROGR
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8.0 Registers (Continued) Table II
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9.0 Typical Applications (Continued
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Table of Contents 1.0 ABSOLUTE MAXI
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3.0 AC Electrical Characteristics T
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4.0 Timing Waveforms (Continued) Wr
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,----------------------------------
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5.0 Block Diagram AO A, A2 CSD CSI
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6.0 Pin Descriptions (Continued) tr
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... .I>. '" Bit No. TABLE II. Summa
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8.0 Registers (Continued) 8.3 PROGR
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8.0 Registers (Continued) When the
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'" .j>. 01 PHil This shows the basi
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,----------------------------------
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3. The Rx FIFO will hold 16 bytes r
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NS16550A E-J r-o ..... IRQ4 ICU CPU
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TITLE 550APP.ASM - NS16550A INITIAL
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3.0 Board to Board Communications w
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DIAPPS.ASM Flow Chart l> z • ~ CO
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» z I "" CD RDAI: DISABLE IRTS, SE
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COMPARE: SET UP COMPARE BUffER POIN
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.set iCu imsk,lO *aO • set icu -c
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holdloop: nop # br hold loop # # #*
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# msint: save [rO,rl,r2,r3] # movd
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#3/30/B7••••• D2APPS.ASM
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# #*************************** 1655
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-----------------------------------
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A Comparison of the I NS8250, NS 16
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-----------------------------------
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cessed (see Figure 4), The output o
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AC Electrical Characteristics T A =
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~National ~ Semiconductor \ J micro
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1.0 Absolute Maximum Ratings 2.0 Op
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4.0 AC Electrical Characteristics (
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5.0 Timing Waveforms (Continued) ii
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-----------------------------------
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6.0 Connection Diagrams Dual-In-Lln
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8.0 Block Diagram CPU INTERFACE INT
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9.0 Registers (Continued) Bit three
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.----------------------------------
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-----------------------------------
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Section 5 Contents MM74HC942 300 Ba
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Absolute Maximum Ratings (Notes 1 &
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fj ::z:: ~ :::IE :::IE ~ ,---------
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Applications Information (Continued
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Absolute Maximum Ratings (Notes 1 &
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Description of Pin Functions Pin No
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~ r--------------------------------
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~ r--------------------------------
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Electrical Characteristics Unless o
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C'I 5 Pin Descriptions (Continued)
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IlAV22 RXIN LOCAL OSCILLATOR (L.O.)
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Functional Description (Continued)
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Functional Description (Continued)
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Absolute Maximum Ratings* If Milita
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Electrical Characteristics unless o
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Functional Description* (Continued)
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,...A212AT RECEIVE FILTER p--------
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TABLE III. Remote Digital Loopback
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.... ~ ~ U) r----------------------
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..... U) z • U) r----------------
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~ .... ,---------------------------
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.,... U) Z 3020 LPRINT USING" 1111
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~ .... r---------------------------
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. II) or- II) Z
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,.. i ~~---------------------------
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Section 6 Transmission Line Drivers
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~National ~ Semiconductor Transmiss
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~National ~ Semiconductor OS 1488 Q
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J?'A National ~ Semiconductor OS 14
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~National ~ Semiconductor DS26C31 C
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~National ~ Semiconductor DS26C32C
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~National ~ Semiconductor DS34C86 Q
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~National ~ Semiconductor PRELIMINA
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~National ~ Semiconductor DS1692/DS
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~National ~ Semiconductor DS75150 D
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~National ~ Semiconductor DS75176A/
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-----------------------------------
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~National ~ Semiconductor DS8922/22
Page 596 and 597:
~National ~ Semiconductor DS96172/~
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~National ~ Semiconductor DS961771
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~National ~ Semiconductor DS9637 AI
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• I .----------------------------
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Section 7 Physical Dimensions
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~National ~ Semiconductor All dimen
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NS Package N16A N16A(REV E) 0.092 X
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t-------------I:..':::~"':I'-------
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0.11M-0.118 (2.642-2.9971 .. ••
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NOTES
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~National ~ Semiconductor Bookshelf
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RELIABILITY HANDBOOK-1986 Reliabili
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NATIONAL SEMICONDUCTOR CORPORATION
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NATIONAL SEMICONDUCTOR CORPORATION
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~ National ~ Semiconductor
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