~ National ~ Semiconductor - Al Kossow's Bitsavers

10.0 Internal Registers (Continued)
10.3 Register Descriptions (Continued)
DATA CONFIGURATION REGISTER (DCR)
OEH(WRITE)
This Register is used to program the NIC for 8- or 16-bit memory interface, select byte ordering in 16-bit applications and
establish FIFO threshholds. The DCR must be Initialized prior to loading the Remote Byte Count Registers. LAS is set on
power up.
7 6 5 4 3 2 1 0
I - I FT1 I I FTO ARM I LS
I I LAS BOS I WTsl
Bit Symbol Description
DO WTS WORD TRANSFER SELECT
0: Selects byte-wide DMA transfers
1: Selects word-wide DMA transfers
; WTS establishes byte or word transfers
for both Remote and Local DMA transfers
Note: When word-wide mode is selected, up to 32k words are addressable; AO remains low.
D1 BOS BYTE ORDER SELECT
0: MS byte placed on AD15-AD8 and LS byte on AD7 -ADO. (32000, 8086)
1: MS byte placed on AD? -ADO and LS byte on AD15-AD8. (68000)
; Ignored when WTS is low
D2 LAS LONG ADDRESS SELECT
0: Dual 16-bit DMA mode
1: Single 32-bit DMA mode
; When LAS is high, the contents of the Remote DMA registers RSARO,1 are issued as A 16-A31
Power up high,
D3 LS LOOPBACK SELECT
0: Loopback mode selected. Bits D1 , D2 of the TCR must also be programmed for Loopback
operation.
1: Normal Operation.
D4 AR AUTO-INITIALIZE REMOTE
0: Send Command not executed, all packets removed from Buffer Ring under program control.
1: Send Command executed, Remote DMA auto-initialized to remove packets from Buffer Ring.
Note: Send Command cannot be used with 68000 type processors.
D5, D6 FTO,FT1 FIFO THRESH HOLD SELECT: Encoded FIFO thresh hold, Establishes point at which bus is
requested when filling or emptying the FIFO. During reception, the FIFO threshold indicates the
number of bytes (or words) the FIFO has filled serially from the network before bus request
(BREQ) is asserted.
Note: FIFO threshold setting determines the DMA burst length.
RECEIVE THRESHOLDS
FT1 FTO Word Wide Byte Wide
0 0 1 Word 2 Bytes
0 1 2 Words 4 Bytes
1 0 4 Words 8 Bytes
1 1 6 Words 12 Bytes
During transmission, the FIFO threshold indicates the numer of bytes (or words) the FIFO has
filled from the Local DMA before BREQ is asserted, Thus, the transmission threshold is 16 bytes
less the receive threshold.
1-20