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~National ~ Semiconductor MM74HC943 300 Baud Modem PRELIMINARY General Description The MM74HC943 is a full duplex low speed modem. It provides a 300 baud bidirectional serial interface for data communication over telephone lines and other narrow bandwidth channels. It is Bell 103 compatible. The MM74HC943 utilizes advanced silicon-gate CMOS technology. Switched capacitor techniques are used to peform analog signal processing. MODULATOR SECTION The modulator contains a frequency synthesizer and a sine wave synthesizer. It produces a phase coherent frequency shift keyed (FSK) output. LINE DRIVER AND HYBRID SECTION The line driver and hybrid are designed to facilitate connection to a 600n phone line. They can perform two to four wire conversion and drive the line at a maximum of -9 dBm. DEMODULATOR SECTION The demodulator incorporates anti-aliasing filters, a receive filter, limiter, discriminator, and carrier detect circuit. The nine-pole receive filter provides 60 dB of transmitted tone rejection. The discriminator is fully balanced for stable operation. Connection and Block Diagrams Dual·ln·Llne Package OSI 20 TLA Features • 5V supply • Drives 600n at -9 dBm • All filters on chip • Transmit level adjustment compatible with universal service order code • TTL and CMOS compatible logic • All inputs protected against static damage • Low power consumption • Full duplex answer or originate operation • Analog loopback for self test • Power down mode Applications • Built-in low speed modems • Remote data collection • Radio telemetry • Credit verification • Stand-alone modems • Point-of-sale terminals • Tone signaling systems • Remote process control Vee GNO GNDA XTAU XTALD ALB 19 GNOA ~ 18 EXI COT 17 TXA TIA RXO 16 RXAI Vee 15 RXA2 08.;---..-_---, COA 14 SaT XTALD 13 O/A TXA ;--...... -
Absolute Maximum Ratings (Notes 1 & 2) Operating Conditions If Military/Aerospace specified devices are required, Min Max Units contact the National Semiconductor Sales Office/ Supply Voltage (Vee) 4.5 5.5 V Distributors for availability and specifications. DC Input or Output Voltage 0 Vee V Supply Voltage (Vee) -0.5 to +7.0V (VIN. VOUT) DC Input Voltage (VIN) -1.5 to Vee+ 1.5V Operating Temp. Range (T A) DC Output Voltage (VOUT) -0.5 to Vce+0.5V MM74HC -40 +85 'c Clamp Diode Current (11K. 10K) ±20mA Input Rise or Fall Times DC Output Current. per pin (lOUT) ±25mA (tr• ttl 500 ns Crystal frequency 3.579 MHz DC Vee or GND Current. per pin (IcC> ±50mA Storage Temperature Range (T STG) -65'C to + 150"C Power Dissipation (Po) (Note 3) 600mW S.O. Package only 500mW Lead Temp. (Td (Soldering 10 seconds) 260"C DC Electrical Characteristics Vee=5V ±10% (unless otherwise specified) 74HC TA=25'C Symbol Parameter Conditions TA= -40 to 85"C Units Typ Guaranteed Limits VIH Minimum High Level 3.15 3.15 V Input Voltage VIL Maximum Low Level 1.1 1.1 V Input Voltage VOH Minimum High Level VIN = VIH or VIL Output Voltage IIOUTI = 20 I£A Vee-0.05 Vee-0.1 Vee-0.1 V IIOUTI =4.0 mAo Vee=4.5V 3.84 3.7 V VOL Maximum Low Level VIN = VIH or VIL Voltage IIOUTI = 20".A 0.1 0.1 V IIOUTI=4.0 mAo Vee=4.5V 0.33 0.4 V liN Maximum Input VIN=VCCorGND ±0.1 ±1.0 ".A Current loz Output TRI-STATE® ALB=SQT=Vee ±5 ".A Leakage Current. RXD and CD Outputs lee Maximum Quiescent VIH=Vee. VIL =GND 8.0 10.0 10.0 mA Supply Current ALB or SQT = GND IGNOA Analog Ground Current Transmit Level = - 9 dBm 1.0 2.0 2.0 mA lee Power Down Supply Current ALB=SQT=Vee 300 ".A VIH = Vee. VIL =GND Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Nole 2: Unless otherwise specified all voltages are referenced to ground. Nole 3: Power Dissipation temperature derating - plastic "N" package: -12 mW rc from 65'C to 85'C; ceramic "J" package: -12 mW rc from l00'C to 125'C. 'The demodulator specllicatlons apply to the MM74HC943 operating with a modulator having frequency accuracy, phase jitter and harmonic COnlant equal to or better than the MM74HC943 modulator. 5-10
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~ National ~ Semiconductor 400014 R
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TRADEMARKS Following is the most cu
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II) c ~ ~National ~ ~ Semiconductor
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Table of Contents (Continued) Secti
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Alpha-Numeric Index(continUed) DS36
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Section 1 Local Area Networks IEEE
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~National ~ Semiconductor DP8390C/N
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3.0 Functional Description (Continu
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5.0 Pin Descriptions (Continued) BU
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6.0 Direct Memory Access Control (D
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7.0 Packet Reception (Continued) Re
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8.0 Packet Transmission (Continued)
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10.0 Internal Registers (Continued)
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12.0 Loopback Diagnostics (Continue
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13.0 Bus Arbitration and Timing The
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13.0 Bus Arbitration and Timing (Co
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15.0 Switching Characteristics AC S
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15.0 Switching Characteristics (Con
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AC Timing Test Conditions Input Pul
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2.0 Block Diagram COL CRS PROTOCOL
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4.0 Transmit/Receive Packet Encapsu
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5.0 Pin Descriptions (Continued) BU
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7.0 Packet Reception (Continued) fo
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7.0 Packet Reception (Continued) Er
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9.0 Remote DMA The Remote DMA chann
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11.0 Initialization Procedures (Con
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13.0 Bus Arbitration and Timing The
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15.0 Switching Characteristics AC S
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AC Timing Test Conditions Input Pul
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2.0 Block Diagram TRANSCEIVER CABLE
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PCC Connection Diagram 39.0. 39.0.
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6.0 Absolute Maximum Ratings Recomm
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9.0 Timing and Load Diagrams (Conti
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2.0 Block Diagram COAX CABLE r ____
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6.0 Absolute Maximum Ratings (Note
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I: • • • • • • Interrup
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PAL20LB Decode and DMA Interface Lo
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~ U16/8 R1 R1,R2=4.7k.o. Note: For
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Although Cheapernet is intended for
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The transmitted packet from the SNI
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Truth Table for Various Collision D
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CHEAPERNET APPLICATION WITH THE DP8
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DP8390 Network Interface Controller
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ping between the received address a
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If the current local DMA address ev
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6.2 Dual Port Memory One popular me
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StarLAN With The DP839EB Evaluation
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SUPPORTING DOCUMENTS The following
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Pulse Transformer U3 .----. j " "P>
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ELECTROSTATIC DISCHARGE TEST (ESD)
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Section 2 Contents DP8340INS32440 I
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.. 0 C'I C") en .... z 0 C") GO Go
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~ 'OIl' N CO) (J) Z .... o 'OIl' CO
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Timing Characteristics Oscillator F
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Timing Waveforms (Continued) TA REG
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.. ... ~ ~National ~ ~ Semiconduc
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Detailed Functional Pin Description
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Message Format (Continued) DATA REC
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Timing Characteristics (Notes 2, 6,
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Timing Waveforms (Continued) 4T±(T
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Typical Applications (Continued) +5
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Timing Characteristics (Continued)
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Functional Timing Waveforms (Contin
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Typical Applications (Continued) DA
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C") "Ot "Ot N C") en ...... z C") "
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Absolute Maximum Ratings (Note 1) I
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MUX~ __________________ The BIPLAN
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An EPROM implementation was selecte
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MASTER MUL TIPLEXING/DE-MUL TIPLEXI
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AN·496 '" 0, '" (U17/ (U23/6) TO 5
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AN-496 t W19 ~ J2-43 I' [; 0 J2-42
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AN·496
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DP8342/DP8343 HIGH SPEED INTERFACE
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2.0 Connection Diagram A13- 12 A12-
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3.0 Pin Descriptions (Continued) Si
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~ ~ 4.0 Electrical Specifications (
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4.0 Electrical Specifications (Cont
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~ ~ 4.0 Electrical Specifications (
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5.0 Instruction Set Overview (Conti
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6.0 Instruction Set Reference (Cont
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~ C') 6.0 Instruction Set Reference
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! 6.0 Instruction Set Reference (Co
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~ ~ 6.0 Instruction Set Reference (
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== ~ 6.0 Instruction Set Reference
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7.0 CPU Registers (Continued) BIT I
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7.0 CPU Registers (Continued) BIRO
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7.0 CPU Registers (Continued) 76543
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7.0 CPU Registers (Continued) BIT D
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7.0 CPU Registers (Continued) BIT D
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8.0 Remote Interface and Arbitratio
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~ ~ HASM state TCU state eLK-OUT RE
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~I tn tn ...._,__'RS A RS, RSC IMEM
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~ 01 CO RASM stat. TCU stat. CLK-OU
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~ ~ I\~"'''' I 'ow = "[OW2-0) , RS
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~ 8l HASM stat. TCU stat. CU- C» b
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10.0 Transceiver (Continued) (a) 32
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10.0 Transceiver (Continued) TABLE
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10.0 Transceiver (Continued) dotted
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10.0 Transceiver (Continued) TABLE
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10.0 Transceiver (Continued) {also
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Decoding Bit Fields with the JRMK I
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Receiver Interrupts/Flags for the D
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****************DA ISR*************
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"Interrupts"-A Powerful Tool of the
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TABLE II. (lCR) Interrupt Mask Bits
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Running the DP8344 with wait states
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» z I U'I Q 01:00 INSTRUCTION ADDR
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WHY EPROM SOFT-LOAD? In a stand-alo
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RESET ~. Timing at Beginning of Ins
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.. I CRYSTAL ~~~.~ I UP TO 64K OP83
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The roll-off frequency, Fro, should
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ceives messages whose first frame a
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RECEIVER INTERRUPT The receiver int
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JMP n LJMP n JMPR Rs JMPI Ptr JRMK
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00044 F90a :J- 226 Z • 227 MOVE A
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l> Z 00074 80BD 2'18 en • 00075 0
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Section 3 ISDN Components
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Introduction To National Semiconduc
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NSC Solutions for Layers 2 and 3 Na
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NSC Solutions: Systems Level Basic
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~National ~ Semiconductor PRELIMINA
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ISDN DEFINITIONS "B" Channel, or DS
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~ '" TE2 UP TO 8 TERMINALS -
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Section 4 Contents INS8250/INS8250-
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3.0 AC Electrical Characteristics T
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. ID
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5.0 Block Diagram INTERNAL DATA IUS
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6.0 Pin Descriptions (Continued) In
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8.0 Registers (Continued) and 1, on
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8.0 Registers (Continued) 8.5 INTER
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~ &I) o N m Z ::::: o &I) 'Of' o co
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~ Lt) o N co U) Z ::::: o Lt) '
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4.0 Timing Waveforms (Continued) Re
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6.0 Pin Descriptions (Continued) Re
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8.0 Registers The system programmer
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8.0 Registers (Continued) 8.3 PROGR
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8.0 Registers (Continued) Table II
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9.0 Typical Applications (Continued
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Table of Contents 1.0 ABSOLUTE MAXI
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3.0 AC Electrical Characteristics T
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4.0 Timing Waveforms (Continued) Wr
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5.0 Block Diagram AO A, A2 CSD CSI
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6.0 Pin Descriptions (Continued) tr
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... .I>. '" Bit No. TABLE II. Summa
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8.0 Registers (Continued) 8.3 PROGR
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8.0 Registers (Continued) When the
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'" .j>. 01 PHil This shows the basi
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3. The Rx FIFO will hold 16 bytes r
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NS16550A E-J r-o ..... IRQ4 ICU CPU
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TITLE 550APP.ASM - NS16550A INITIAL
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3.0 Board to Board Communications w
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DIAPPS.ASM Flow Chart l> z • ~ CO
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» z I "" CD RDAI: DISABLE IRTS, SE
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Page 478 and 479: .set iCu imsk,lO *aO • set icu -c
Page 480 and 481: holdloop: nop # br hold loop # # #*
Page 482 and 483: # msint: save [rO,rl,r2,r3] # movd
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Page 490 and 491: A Comparison of the I NS8250, NS 16
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Page 494 and 495: cessed (see Figure 4), The output o
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Page 500 and 501: 1.0 Absolute Maximum Ratings 2.0 Op
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Page 508 and 509: 6.0 Connection Diagrams Dual-In-Lln
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Page 512 and 513: 9.0 Registers (Continued) Bit three
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Page 519 and 520: Section 5 Contents MM74HC942 300 Ba
Page 521 and 522: Absolute Maximum Ratings (Notes 1 &
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Page 525: Applications Information (Continued
Page 529 and 530: Description of Pin Functions Pin No
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Page 535 and 536: Electrical Characteristics Unless o
Page 537 and 538: C'I 5 Pin Descriptions (Continued)
Page 539 and 540: IlAV22 RXIN LOCAL OSCILLATOR (L.O.)
Page 541 and 542: Functional Description (Continued)
Page 543 and 544: Functional Description (Continued)
Page 545 and 546: Absolute Maximum Ratings* If Milita
Page 547 and 548: Electrical Characteristics unless o
Page 549 and 550: Functional Description* (Continued)
Page 551 and 552: ,...A212AT RECEIVE FILTER p--------
Page 553 and 554: TABLE III. Remote Digital Loopback
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Page 561 and 562: .,... U) Z 3020 LPRINT USING" 1111
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Page 570 and 571: Section 6 Transmission Line Drivers
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J?'A National ~ Semiconductor OS 14
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~National ~ Semiconductor DS26C31 C
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~National ~ Semiconductor DS26C32C
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~National ~ Semiconductor DS34C86 Q
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~National ~ Semiconductor PRELIMINA
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~National ~ Semiconductor DS1692/DS
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~National ~ Semiconductor DS75150 D
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~National ~ Semiconductor DS75176A/
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~National ~ Semiconductor DS8922/22
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~National ~ Semiconductor DS96172/~
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~National ~ Semiconductor DS961771
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~National ~ Semiconductor DS9637 AI
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• I .----------------------------
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Section 7 Physical Dimensions
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~National ~ Semiconductor All dimen
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NS Package N16A N16A(REV E) 0.092 X
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t-------------I:..':::~"':I'-------
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0.11M-0.118 (2.642-2.9971 .. ••
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NOTES
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~National ~ Semiconductor Bookshelf
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RELIABILITY HANDBOOK-1986 Reliabili
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NATIONAL SEMICONDUCTOR CORPORATION
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NATIONAL SEMICONDUCTOR CORPORATION
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~ National ~ Semiconductor
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