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----------------------------------------------------------------------,~ ~National ~ Semiconductor TP3410 "U" Interface Transceiver ADVANCE INFORMATION "CI w "" ..... o General Description The TP341 0 is a microCMOS monolithic digital transceiver which provides voice or data communications capability over a twisted pair of wires in the Public Network. The device functions at either end of the subscriber loop, handling voice and data transmissions between the Network Termination (NT) to the Central Office (CO) line card. The TP341 0 has facilities to transmit and receive using the standard ISDN 2B + D (2 64 kb/ sand 1 16 kb/ s channels) 144 kb/ s full duplex channels plus extra channels (for loop maintenance and performance monitoring) for a total of 160 kb/s. These channels will operate over very long Central office subscriber loops of mixed gauges from #26 to #19 AWG (0.4-0.8 mm), which may include bridge taps. At the time of this writing, the United States T1 D1 committee for the Standardization of the U interface has not yet finalized the performance specification. Preliminary Features • 160 kb/s full duplex transmission for 2B+D • Handles all layer 1 functions • 2B1Q line coding • Range at least 18 kft • #26-#19 AWG (0.4-0.9 mm) mixed gauge wire compatibility • 70 dB of Echo Cancellation • Bridge Tap Equalization • microCMOS, + 5V only Block Diagram SCRAMBLER ADAPTIVE CANCELLATION FILTER ClK TLiH/9151-1 3-9
~National ~ Semiconductor PRELIMINARY ..... TP3420 ISDN Transceiver "S" Interface Device General Description The TP3420 (S Interface Device) is a complete monolithic transceiver for data transmission on twisted pair subscriber loops. It is built on National's advanced double metal micro CMOS process, and requires only a single +5V supply. All functions specified in CCITI recommendation 1.430 for ISDN basic access at the'S' and 'T' interfaces are provided, and the device can be configured to operate either in a TE (Terminal Equipment), in an NT-1 or NT-2 (Network Termination) or as a PABX line-card device. As specified in 1.430, full-duplex transmission at 192 kb/s is provided on separate transmit and receive twisted wire pairs using inverted Alternate Mark Inversion (AMI) line coding. Various channels are combined to form the 192 kb/s aggregate rate, including 2 'B' channels, each of 64 kb/s, and 1 'D' channel at 16 kb/s. In addition, the TP3420 provides the 800 b/s multiframe channels for Layer 1 maintenance. All 1.430 wiring configurations are supported by the TP3420 SID, including the "passive bus" for up to 8 TE's distributed within 200 meters of low capacitance cable, and point-topoint and point-to-star connections up to at least 1500 meters. Adaptive receive signal processing enables the device to operate with low bit error rates on any of the standard types of cable pairs commonly found in premise wiring installations. \ J microCMOS Features • Single Chip 4 Wire 192 kb/s Transceiver • Provides all CCITI 1.430 Layer 1 Functions • Exceeds 1.430 range: 1.5 km Point-to-Point • Adaptive and Fixed Timing Options for NT-1 • Clock Resynchronizer and Data Buffers for NT-2 • Multiframe Channel for Layer 1 Maintenance • Selectable System Interface Formats • Microwire compatible serial control interface • microCMOS, + 5V only • 20 Pin Package Applications • Same Device for NT, TE and PBX Line Card • Point-to-Point Range Extended to 1.5 km • POint-to-Multipoint for all 1.430 Configurations • Easy Interface to: LAPD Processor Terminal Adapter Codec/Filter COMBOTM "U" Interface Device Line Card Backplanes HPC16400 HPC16400 TP305417 TP3410 Block Diagram SYSTEM INTERFACE BCLK Bx B, FSa FS b o-CHANNEL ACCESS XTAL2 t.lCLK/XTAL Vee rt, TRANSMIT FRAt.tING AND At.ll CODER ...... --Lo· DENx CONTROL INTERFACE LSD CCLK --""'" CI --""," CO CONTROL cs ---+I iNT L ___ r----..J L.tJ GND TL/H/9143-1 3-10
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~ National ~ Semiconductor 400014 R
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TRADEMARKS Following is the most cu
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II) c ~ ~National ~ ~ Semiconductor
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Table of Contents (Continued) Secti
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Alpha-Numeric Index(continUed) DS36
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Section 1 Local Area Networks IEEE
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~National ~ Semiconductor DP8390C/N
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3.0 Functional Description (Continu
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5.0 Pin Descriptions (Continued) BU
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6.0 Direct Memory Access Control (D
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7.0 Packet Reception (Continued) Re
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8.0 Packet Transmission (Continued)
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10.0 Internal Registers (Continued)
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12.0 Loopback Diagnostics (Continue
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13.0 Bus Arbitration and Timing The
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13.0 Bus Arbitration and Timing (Co
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15.0 Switching Characteristics AC S
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15.0 Switching Characteristics (Con
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AC Timing Test Conditions Input Pul
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2.0 Block Diagram COL CRS PROTOCOL
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4.0 Transmit/Receive Packet Encapsu
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5.0 Pin Descriptions (Continued) BU
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7.0 Packet Reception (Continued) fo
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7.0 Packet Reception (Continued) Er
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9.0 Remote DMA The Remote DMA chann
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11.0 Initialization Procedures (Con
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13.0 Bus Arbitration and Timing The
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15.0 Switching Characteristics AC S
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AC Timing Test Conditions Input Pul
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2.0 Block Diagram TRANSCEIVER CABLE
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PCC Connection Diagram 39.0. 39.0.
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6.0 Absolute Maximum Ratings Recomm
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9.0 Timing and Load Diagrams (Conti
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2.0 Block Diagram COAX CABLE r ____
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6.0 Absolute Maximum Ratings (Note
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I: • • • • • • Interrup
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PAL20LB Decode and DMA Interface Lo
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~ U16/8 R1 R1,R2=4.7k.o. Note: For
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Although Cheapernet is intended for
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The transmitted packet from the SNI
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Truth Table for Various Collision D
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CHEAPERNET APPLICATION WITH THE DP8
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DP8390 Network Interface Controller
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ping between the received address a
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If the current local DMA address ev
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6.2 Dual Port Memory One popular me
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StarLAN With The DP839EB Evaluation
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SUPPORTING DOCUMENTS The following
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Pulse Transformer U3 .----. j " "P>
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ELECTROSTATIC DISCHARGE TEST (ESD)
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Section 2 Contents DP8340INS32440 I
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.. 0 C'I C") en .... z 0 C") GO Go
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~ 'OIl' N CO) (J) Z .... o 'OIl' CO
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Timing Characteristics Oscillator F
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Timing Waveforms (Continued) TA REG
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.. ... ~ ~National ~ ~ Semiconduc
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Detailed Functional Pin Description
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Message Format (Continued) DATA REC
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Timing Characteristics (Notes 2, 6,
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Timing Waveforms (Continued) 4T±(T
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Typical Applications (Continued) +5
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Timing Characteristics (Continued)
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Functional Timing Waveforms (Contin
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Typical Applications (Continued) DA
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C") "Ot "Ot N C") en ...... z C") "
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Absolute Maximum Ratings (Note 1) I
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MUX~ __________________ The BIPLAN
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An EPROM implementation was selecte
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MASTER MUL TIPLEXING/DE-MUL TIPLEXI
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AN·496 '" 0, '" (U17/ (U23/6) TO 5
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AN-496 t W19 ~ J2-43 I' [; 0 J2-42
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AN·496
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DP8342/DP8343 HIGH SPEED INTERFACE
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2.0 Connection Diagram A13- 12 A12-
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3.0 Pin Descriptions (Continued) Si
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~ ~ 4.0 Electrical Specifications (
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4.0 Electrical Specifications (Cont
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~ ~ 4.0 Electrical Specifications (
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c( '
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5.0 Instruction Set Overview (Conti
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6.0 Instruction Set Reference (Cont
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~ C') 6.0 Instruction Set Reference
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! 6.0 Instruction Set Reference (Co
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7.0 CPU Registers (Continued) BIT I
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7.0 CPU Registers (Continued) BIRO
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7.0 CPU Registers (Continued) 76543
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7.0 CPU Registers (Continued) BIT D
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7.0 CPU Registers (Continued) BIT D
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8.0 Remote Interface and Arbitratio
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~ ~ HASM state TCU state eLK-OUT RE
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~I tn tn ...._,__'RS A RS, RSC IMEM
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~ 01 CO RASM stat. TCU stat. CLK-OU
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~ ~ I\~"'''' I 'ow = "[OW2-0) , RS
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~ 8l HASM stat. TCU stat. CU- C» b
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10.0 Transceiver (Continued) (a) 32
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10.0 Transceiver (Continued) TABLE
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10.0 Transceiver (Continued) dotted
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10.0 Transceiver (Continued) TABLE
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10.0 Transceiver (Continued) {also
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Page 348 and 349: Decoding Bit Fields with the JRMK I
Page 350 and 351: Receiver Interrupts/Flags for the D
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Page 354 and 355: "Interrupts"-A Powerful Tool of the
Page 356 and 357: TABLE II. (lCR) Interrupt Mask Bits
Page 358 and 359: Running the DP8344 with wait states
Page 360 and 361: » z I U'I Q 01:00 INSTRUCTION ADDR
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Page 386 and 387: 00044 F90a :J- 226 Z • 227 MOVE A
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Page 390 and 391: Section 3 ISDN Components
Page 392 and 393: Introduction To National Semiconduc
Page 394 and 395: NSC Solutions for Layers 2 and 3 Na
Page 396 and 397: NSC Solutions: Systems Level Basic
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5.0 Block Diagram AO A, A2 CSD CSI
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6.0 Pin Descriptions (Continued) tr
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... .I>. '" Bit No. TABLE II. Summa
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8.0 Registers (Continued) 8.3 PROGR
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8.0 Registers (Continued) When the
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'" .j>. 01 PHil This shows the basi
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3. The Rx FIFO will hold 16 bytes r
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NS16550A E-J r-o ..... IRQ4 ICU CPU
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TITLE 550APP.ASM - NS16550A INITIAL
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3.0 Board to Board Communications w
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DIAPPS.ASM Flow Chart l> z • ~ CO
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» z I "" CD RDAI: DISABLE IRTS, SE
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COMPARE: SET UP COMPARE BUffER POIN
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.set iCu imsk,lO *aO • set icu -c
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holdloop: nop # br hold loop # # #*
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# msint: save [rO,rl,r2,r3] # movd
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#3/30/B7••••• D2APPS.ASM
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# #*************************** 1655
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A Comparison of the I NS8250, NS 16
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cessed (see Figure 4), The output o
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AC Electrical Characteristics T A =
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~National ~ Semiconductor \ J micro
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1.0 Absolute Maximum Ratings 2.0 Op
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4.0 AC Electrical Characteristics (
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5.0 Timing Waveforms (Continued) ii
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6.0 Connection Diagrams Dual-In-Lln
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8.0 Block Diagram CPU INTERFACE INT
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9.0 Registers (Continued) Bit three
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Section 5 Contents MM74HC942 300 Ba
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Absolute Maximum Ratings (Notes 1 &
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fj ::z:: ~ :::IE :::IE ~ ,---------
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Applications Information (Continued
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Absolute Maximum Ratings (Notes 1 &
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Description of Pin Functions Pin No
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Electrical Characteristics Unless o
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C'I 5 Pin Descriptions (Continued)
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IlAV22 RXIN LOCAL OSCILLATOR (L.O.)
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Functional Description (Continued)
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Functional Description (Continued)
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Absolute Maximum Ratings* If Milita
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Electrical Characteristics unless o
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Functional Description* (Continued)
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,...A212AT RECEIVE FILTER p--------
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TABLE III. Remote Digital Loopback
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.,... U) Z 3020 LPRINT USING" 1111
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. II) or- II) Z
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Section 6 Transmission Line Drivers
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~National ~ Semiconductor Transmiss
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~National ~ Semiconductor OS 1488 Q
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J?'A National ~ Semiconductor OS 14
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~National ~ Semiconductor DS26C31 C
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~National ~ Semiconductor DS26C32C
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~National ~ Semiconductor DS34C86 Q
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~National ~ Semiconductor PRELIMINA
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~National ~ Semiconductor DS1692/DS
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~National ~ Semiconductor DS75150 D
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~National ~ Semiconductor DS75176A/
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~National ~ Semiconductor DS8922/22
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~National ~ Semiconductor DS96172/~
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~National ~ Semiconductor DS961771
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~National ~ Semiconductor DS9637 AI
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• I .----------------------------
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Section 7 Physical Dimensions
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~National ~ Semiconductor All dimen
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NS Package N16A N16A(REV E) 0.092 X
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t-------------I:..':::~"':I'-------
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0.11M-0.118 (2.642-2.9971 .. ••
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NOTES
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~National ~ Semiconductor Bookshelf
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RELIABILITY HANDBOOK-1986 Reliabili
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NATIONAL SEMICONDUCTOR CORPORATION
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NATIONAL SEMICONDUCTOR CORPORATION
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~ National ~ Semiconductor
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