~ National ~ Semiconductor - Al Kossow's Bitsavers

Absolute Maximum Ratings (Note 1)
If MIlitary/Aerospace specified devices are required, Maximum Power Dissipation @25'C'
contact the National Semiconductor Sales Office/ Cavity Package 2237mW
Distributors for availability and specifications. Dual·ln·Line Package 2500mW
Supply Voltage, Vee 7V Plastic Chip Carrier 1720 mw
I nput Voltage 5.5V
'Derate cavity package t4.9 mW/,C above 25'C; derate dual·ln·llne pack·
age 20 mW/'C above 25'C; derate PCC package 13.8 mW/'C above 25'C.
Output Voltage 5.25V
Storage Temperature Range -65'C to + 150'C Operating Conditions
lead Temperature (Soldering, 10 sec.) 300'C Min Max Units
Supply Voltage, (Vee) 4.75 5.25 V
Electrical Characteristics (Notes 2 and 3)
Ambient Temperature, T A 0 +70 'C
Symbol Parameter Conditions Min Typ Max Units
VIH
VIL
logic "1" Input Voltage
(All Inputs Except X1 and X2)
logic "0" Input Voltage
(All Inputs Except X1 and X2)
VeLAMP Input Clamp Voltage liN = -12 mA
(All Inputs Except X1 and X2)
IIH logic "1" Input Current Vee = 5.25V
Register load Input VIN = 5.25V
2.0 V
0.8 V
-0.8 -1.2 V
0.3 120 /1-A
All Others Except X 1 and X2 0.1 40 /1-A
IlL logic "0" Input Current Vee = 5.25V
Register load Input VIN = 0.5V
-15 -300 /1-A
All Inputs Except X1 and X2 -5 -100 /1-A
VOH1 logic "1" All Outputs Except ClK OUT, 10H = -100/1-A 3.2 3.9 V
DATA, DATA, and DATA DELAY
10H = -1 mA 2.5 3.4 V
VOH2
Vou
VOL2
logic "1" for CKl OUT, DATA,
DATA and DATA DELAY Outputs
logic "0" All Outputs Except ClK OUT,
DATA, DATA and DATA DELAY Outputs
logic "0" for ClK OUT, DATA,
DATA and DATA DELAY Outputs
10H = -10 mA 2.6 3.0 V
10L = 5mA 0.35 0.5 V
10L = 20mA 0.4 0.6 V
1081 Short Circuit Current for All Outputs
VOUT = OV
Except ClK OUT, DATA, DATA, and -10 -30 -100 mA
(Note 4)
DATA DELAY
1082 Short Circuit Current for DATA, VOUT = OV
DATA, and DATA DELAY Outputs (Note 4)
-50 -140 -350 mA
1083 Short Circuit Current for ClK OUT (Note 4) -30 -90 -200 mA
lee Power Supply Current Vee = 5.25V 170 250 mA
Timing Characteristics Oscillator Frequency = 18.867 MHz (Notes 2 and 3)
Symbol Parameter Conditions Min Typ Max Units
tpd1 REG lOAD to Transmitter Active (T A) load Circuit 1
Positive Edge Figure 7
tpd2 REG lOAD to REG Full; Positive Edge load Circuit 1
Figure 7
tpd3 Register Full to T A; Negative Edge load Circuit 1
Figure 7
tpd4 Positive Edge of REG lOAD to load Circuits 1 & 2
Positive Edge of DATA Figure 9
60 90
45 75
40 70
50 80
ns
ns
ns
ns
2·7