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Section 2 High Speed Seriall IBM Data Communications
Section 2 Contents DP8340INS32440 IBM 3270 Protocol Transmitter/Encoder ............................. 2-3 DP8341INS32441 IBM 3270 Protocol Receiver/Decoder................................ 2-12 DP8342INS32442 High-Speed 8-Bit Serial Transmitter/Encoder. . . . . . . . .. . . .. . . .. . .. . . . . 2-23 DP8343/NS32443 High-Speed 8-Bit Serial Receiver/Decoder ........................... 2-33 AN-496 the BIPLAN DP8342/DP8343 Biphase Local Area Network. . . . . . . . . . . . . . . . . . . . . . . 2-44 DP8344 Biphase Communications Processor-BCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-63 AB-33 Choosing Your RAM for the Biphase Communications Processor . . . . . . . . . . . . . . . . . .. 2-179 AB-34 Decoding Bit Fields with the "JRMK" Instruction. .. .. .. ... ... .. .. .. . . .. ... . . .. .. .. 2-181 AB-35 Receiver Interrupts/Flags for the DP8344 Biphase Communications Processor. . . . . . . 2-183 AN-517 Receiving 5250 Protocol Messages with the Biphase Communications Processor ... 2-184 AN-499 "Interrupts"-A Powerful Tool of the Biphase Communications Processor.......... 2-187 AN-504 DP8344 BCP Stand-<strong>Al</strong>one Soft-Load System................................... 2-192 AN-516 Interfacing the DP8344 to Twinax ............................................. 2-203 2-2
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~ National ~ Semiconductor 400014 R
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TRADEMARKS Following is the most cu
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II) c ~ ~National ~ ~ Semiconductor
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Table of Contents (Continued) Secti
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Alpha-Numeric Index(continUed) DS36
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Section 1 Local Area Networks IEEE
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~National ~ Semiconductor DP8390C/N
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3.0 Functional Description (Continu
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5.0 Pin Descriptions (Continued) BU
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6.0 Direct Memory Access Control (D
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7.0 Packet Reception (Continued) Re
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8.0 Packet Transmission (Continued)
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10.0 Internal Registers (Continued)
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12.0 Loopback Diagnostics (Continue
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13.0 Bus Arbitration and Timing The
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13.0 Bus Arbitration and Timing (Co
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15.0 Switching Characteristics AC S
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15.0 Switching Characteristics (Con
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AC Timing Test Conditions Input Pul
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2.0 Block Diagram COL CRS PROTOCOL
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4.0 Transmit/Receive Packet Encapsu
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5.0 Pin Descriptions (Continued) BU
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7.0 Packet Reception (Continued) fo
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7.0 Packet Reception (Continued) Er
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9.0 Remote DMA The Remote DMA chann
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11.0 Initialization Procedures (Con
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13.0 Bus Arbitration and Timing The
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15.0 Switching Characteristics AC S
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AC Timing Test Conditions Input Pul
Page 116 and 117: 2.0 Block Diagram TRANSCEIVER CABLE
Page 118 and 119: PCC Connection Diagram 39.0. 39.0.
Page 120 and 121: 6.0 Absolute Maximum Ratings Recomm
Page 122 and 123: 9.0 Timing and Load Diagrams (Conti
Page 126 and 127: 2.0 Block Diagram COAX CABLE r ____
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Page 130 and 131: 6.0 Absolute Maximum Ratings (Note
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Page 138 and 139: I: • • • • • • Interrup
Page 140 and 141: PAL20LB Decode and DMA Interface Lo
Page 142 and 143: ~ U16/8 R1 R1,R2=4.7k.o. Note: For
Page 144 and 145: Although Cheapernet is intended for
Page 146 and 147: The transmitted packet from the SNI
Page 148 and 149: Truth Table for Various Collision D
Page 150 and 151: CHEAPERNET APPLICATION WITH THE DP8
Page 152 and 153: DP8390 Network Interface Controller
Page 154 and 155: ping between the received address a
Page 156 and 157: If the current local DMA address ev
Page 158 and 159: 6.2 Dual Port Memory One popular me
Page 160 and 161: StarLAN With The DP839EB Evaluation
Page 162 and 163: SUPPORTING DOCUMENTS The following
Page 164 and 165: Pulse Transformer U3 .----. j " "P>
Page 166: ELECTROSTATIC DISCHARGE TEST (ESD)
Page 171 and 172: .. 0 C'I C") en .... z 0 C") GO Go
Page 173 and 174: ~ 'OIl' N CO) (J) Z .... o 'OIl' CO
Page 175 and 176: Timing Characteristics Oscillator F
Page 177 and 178: Timing Waveforms (Continued) TA REG
Page 179 and 180: .. ... ~ ~National ~ ~ Semiconduc
Page 181 and 182: Detailed Functional Pin Description
Page 183 and 184: Message Format (Continued) DATA REC
Page 185 and 186: Timing Characteristics (Notes 2, 6,
Page 187 and 188: Timing Waveforms (Continued) 4T±(T
Page 189 and 190: Typical Applications (Continued) +5
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Page 193 and 194: ~ ..,. r---------------------------
Page 195 and 196: Timing Characteristics (Continued)
Page 197 and 198: Functional Timing Waveforms (Contin
Page 199 and 200: Typical Applications (Continued) DA
Page 201 and 202: C") "Ot "Ot N C") en ...... z C") "
Page 203 and 204: ) r--------------------------------
Page 205 and 206: Absolute Maximum Ratings (Note 1) I
Page 207 and 208: (W) r------------------------------
Page 209 and 210: M r--------------------------------
Page 211 and 212: MUX~ __________________ The BIPLAN
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~ .--------------------------------
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An EPROM implementation was selecte
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MASTER MUL TIPLEXING/DE-MUL TIPLEXI
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AN·496 '" 0, '" (U17/ (U23/6) TO 5
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AN-496 t W19 ~ J2-43 I' [; 0 J2-42
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AN·496
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DP8342/DP8343 HIGH SPEED INTERFACE
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2.0 Connection Diagram A13- 12 A12-
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3.0 Pin Descriptions (Continued) Si
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~ ~ 4.0 Electrical Specifications (
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4.0 Electrical Specifications (Cont
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~ ~ 4.0 Electrical Specifications (
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c( '
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~L ______________ ___ ~ ~ 4.0 Elect
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5.0 Instruction Set Overview (Conti
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6.0 Instruction Set Reference (Cont
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~ C') 6.0 Instruction Set Reference
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! 6.0 Instruction Set Reference (Co
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~ ~ 6.0 Instruction Set Reference (
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== ~ 6.0 Instruction Set Reference
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7.0 CPU Registers (Continued) BIT I
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7.0 CPU Registers (Continued) BIRO
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7.0 CPU Registers (Continued) 76543
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7.0 CPU Registers (Continued) BIT D
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7.0 CPU Registers (Continued) BIT D
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8.0 Remote Interface and Arbitratio
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~ ~ HASM state TCU state eLK-OUT RE
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~I tn tn ...._,__'RS A RS, RSC IMEM
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~ 01 CO RASM stat. TCU stat. CLK-OU
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~ ~ I\~"'''' I 'ow = "[OW2-0) , RS
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~ 8l HASM stat. TCU stat. CU- C» b
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10.0 Transceiver (Continued) (a) 32
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10.0 Transceiver (Continued) TABLE
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10.0 Transceiver (Continued) dotted
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10.0 Transceiver (Continued) TABLE
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10.0 Transceiver (Continued) {also
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Decoding Bit Fields with the JRMK I
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Receiver Interrupts/Flags for the D
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****************DA ISR*************
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"Interrupts"-A Powerful Tool of the
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TABLE II. (lCR) Interrupt Mask Bits
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Running the DP8344 with wait states
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» z I U'I Q 01:00 INSTRUCTION ADDR
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WHY EPROM SOFT-LOAD? In a stand-alo
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RESET ~. Timing at Beginning of Ins
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.. I CRYSTAL ~~~.~ I UP TO 64K OP83
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The roll-off frequency, Fro, should
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ceives messages whose first frame a
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RECEIVER INTERRUPT The receiver int
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JMP n LJMP n JMPR Rs JMPI Ptr JRMK
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00044 F90a :J- 226 Z • 227 MOVE A
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l> Z 00074 80BD 2'18 en • 00075 0
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Section 3 ISDN Components
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Introduction To National Semiconduc
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NSC Solutions for Layers 2 and 3 Na
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NSC Solutions: Systems Level Basic
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~National ~ Semiconductor PRELIMINA
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ISDN DEFINITIONS "B" Channel, or DS
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~ '" TE2 UP TO 8 TERMINALS -
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Section 4 Contents INS8250/INS8250-
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m . r------------------------------
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3.0 AC Electrical Characteristics T
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. ID
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5.0 Block Diagram INTERNAL DATA IUS
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6.0 Pin Descriptions (Continued) In
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8.0 Registers (Continued) and 1, on
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8.0 Registers (Continued) 8.5 INTER
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m r--------------------------------
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~ &I) o N m Z ::::: o &I) 'Of' o co
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~ Lt) o N co U) Z ::::: o Lt) '
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4.0 Timing Waveforms (Continued) Re
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6.0 Pin Descriptions (Continued) Re
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8.0 Registers The system programmer
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8.0 Registers (Continued) 8.3 PROGR
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8.0 Registers (Continued) Table II
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9.0 Typical Applications (Continued
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Table of Contents 1.0 ABSOLUTE MAXI
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3.0 AC Electrical Characteristics T
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4.0 Timing Waveforms (Continued) Wr
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5.0 Block Diagram AO A, A2 CSD CSI
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6.0 Pin Descriptions (Continued) tr
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... .I>. '" Bit No. TABLE II. Summa
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8.0 Registers (Continued) 8.3 PROGR
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8.0 Registers (Continued) When the
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'" .j>. 01 PHil This shows the basi
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3. The Rx FIFO will hold 16 bytes r
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NS16550A E-J r-o ..... IRQ4 ICU CPU
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TITLE 550APP.ASM - NS16550A INITIAL
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3.0 Board to Board Communications w
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DIAPPS.ASM Flow Chart l> z • ~ CO
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» z I "" CD RDAI: DISABLE IRTS, SE
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COMPARE: SET UP COMPARE BUffER POIN
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.set iCu imsk,lO *aO • set icu -c
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holdloop: nop # br hold loop # # #*
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# msint: save [rO,rl,r2,r3] # movd
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#3/30/B7••••• D2APPS.ASM
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# #*************************** 1655
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A Comparison of the I NS8250, NS 16
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cessed (see Figure 4), The output o
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AC Electrical Characteristics T A =
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~National ~ Semiconductor \ J micro
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1.0 Absolute Maximum Ratings 2.0 Op
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4.0 AC Electrical Characteristics (
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5.0 Timing Waveforms (Continued) ii
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6.0 Connection Diagrams Dual-In-Lln
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8.0 Block Diagram CPU INTERFACE INT
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9.0 Registers (Continued) Bit three
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.----------------------------------
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Section 5 Contents MM74HC942 300 Ba
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Absolute Maximum Ratings (Notes 1 &
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fj ::z:: ~ :::IE :::IE ~ ,---------
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Applications Information (Continued
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Absolute Maximum Ratings (Notes 1 &
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Description of Pin Functions Pin No
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Electrical Characteristics Unless o
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C'I 5 Pin Descriptions (Continued)
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IlAV22 RXIN LOCAL OSCILLATOR (L.O.)
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Functional Description (Continued)
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Functional Description (Continued)
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Absolute Maximum Ratings* If Milita
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Electrical Characteristics unless o
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Functional Description* (Continued)
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,...A212AT RECEIVE FILTER p--------
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TABLE III. Remote Digital Loopback
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.... ~ ~ U) r----------------------
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..... U) z • U) r----------------
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.,... U) Z 3020 LPRINT USING" 1111
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. II) or- II) Z
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Section 6 Transmission Line Drivers
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~National ~ Semiconductor Transmiss
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~National ~ Semiconductor OS 1488 Q
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J?'A National ~ Semiconductor OS 14
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~National ~ Semiconductor DS26C31 C
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~National ~ Semiconductor DS26C32C
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~National ~ Semiconductor DS34C86 Q
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~National ~ Semiconductor PRELIMINA
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~National ~ Semiconductor DS1692/DS
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~National ~ Semiconductor DS75150 D
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~National ~ Semiconductor DS75176A/
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-----------------------------------
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~National ~ Semiconductor DS8922/22
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~National ~ Semiconductor DS96172/~
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~National ~ Semiconductor DS961771
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~National ~ Semiconductor DS9637 AI
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• I .----------------------------
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Section 7 Physical Dimensions
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~National ~ Semiconductor All dimen
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NS Package N16A N16A(REV E) 0.092 X
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t-------------I:..':::~"':I'-------
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0.11M-0.118 (2.642-2.9971 .. ••
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NOTES
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~National ~ Semiconductor Bookshelf
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RELIABILITY HANDBOOK-1986 Reliabili
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NATIONAL SEMICONDUCTOR CORPORATION
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NATIONAL SEMICONDUCTOR CORPORATION
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~ National ~ Semiconductor
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