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~ National ~ Semiconductor - Al Kossow's Bitsavers

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5.0 Instruction Set Overview (Continued)<br />

The BCP has one conditional call instruction capable of<br />

testing any bit in any currently active CPU register. This call<br />

only supports absolute instruction addressing. Table XVII<br />

shows the conditional call instruction syntax and operation.<br />

The return instruction complemetns the above call instructions.<br />

Two versions of the return instruction exist, the uncondtional<br />

return and the conditional return. When the unconditional<br />

return instruction is executed, it pops the last<br />

address on the CPU's Address Stack into the program<br />

counter and it can optionally affect the [GIE) bit, the ALU<br />

flags, and the register bank selection. Table XVIII shows the<br />

syntax and operation of the unconditional return instruction.<br />

The conditional return instruction functions the same as the<br />

unconditional return instruction if a desired condition is met.<br />

As with the conditional jump instruction, the conditional return<br />

instruction has two possible syntaxes. Table XIX lists<br />

the syntax for the conditional return. The "f" flags and the<br />

"cc" conditions for the return instruction are the same as<br />

for the conditional jump instruction, therefore refer to Table<br />

XII and Table XIII for the listing of "'" and "cc", respectively.<br />

TABLE XVII. Conditional Call Instruction<br />

Syntax Instruction Operation Operand Range<br />

LCALL Rs, p, s, nn If the bit of register "Rs" in position<br />

"p" is in the state "s" then<br />

PC & [GIE) & ALU flags &<br />

reg. bank selection -+ Address Stack<br />

nn -+ RC<br />

End if<br />

Note: PC = Program Counter; contents inHially points to instruction following call.<br />

[GIEI = Global Interrupt Enable bit<br />

& = concatenation operator, combines operands together forming one long operand.<br />

0,64k<br />

Addressing Mode<br />

Register, Absolute<br />

TABLE XVIII. Unconditional Return Instruction<br />

RET<br />

Syntax<br />

(g (, rfll<br />

Instruction Operation<br />

Case "g" of<br />

0: leave [GIE) unaffected, (default)<br />

1: restore [GIE) from Address Stack<br />

2: set [GIE)<br />

3: clear [GIE)<br />

End case<br />

If "rf" = 1 then<br />

restore ALU flags from Address Stack<br />

restore register bank selection from Address Stack<br />

Else (the default)<br />

leave the ALU flags and register bank selections unchanged<br />

End if<br />

Address Stack -+ PC<br />

Note: PC = Program Counter<br />

[GIEI = Global Enable bit<br />

II = surrounds optional operands; not part of the instruction syntax.<br />

Optional operands may either be specified or omitted.<br />

RETF<br />

Rcc<br />

Syntax<br />

f, s (, (gl, (, rfll<br />

(g (,rfll<br />

TABLE XIX. Conditional Return Instruction<br />

Note: See Table XVIII for an explanation of "RET (g (, rfll"<br />

(I = SUrrounds optional operands; not part of the instruction syntax.<br />

Optional operands may either be specHied or omitted.<br />

Instruction Operand<br />

lithe flag "'" is in the state "s" then perform a RET (g (, rf) )<br />

If the condition "cc" is met then perform a RET (g (,rf) )<br />

2-97

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