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~ National ~ Semiconductor - Al Kossow's Bitsavers

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10.0 Internal Registers (Continued)<br />

10.3 Register Descriptions (Continued)<br />

DATA CONFIGURATION REGISTER (OCR)<br />

OEH (WRITE)<br />

This Register is used to program the NIC for 8- or 16-bit memory interface, select byte ordering in 16-bit applications and<br />

establish FIFO thresh holds. The DCR must be initialized prior to loading the Remote Byte Count Registers. LAS is set on<br />

power up.<br />

I -<br />

7 6 5 4 3 2 1 0<br />

! FT1 ! FTO ! ARM! LS<br />

LAS<br />

!<br />

! BOS! WTS!<br />

C<br />

"'D<br />

00<br />

Co)<br />

CQ<br />

o<br />

o<br />

I<br />

......<br />

.......<br />

Z<br />

(J)<br />

Co)<br />

N<br />

CQ<br />

""" o<br />

o<br />

I<br />

......<br />

Bit Symbol Description<br />

DO WTS WORD TRANSFER SELECT<br />

0: Selects byte·wide DMA transfers<br />

1: Selects word·wide DMA transfers<br />

; WTS establishes byte or word transfers<br />

for both Remote and Local DMA transfers<br />

Note: When word·wide mode is selected, up to 32k words are addressable; AO remains low.<br />

D1 BOS BYTE ORDER SELECT<br />

0: MS byte placed on AD15-AD8 and LS byte on AD7 -ADO. (32000, 8086)<br />

1: MS byte placed on AD7 -ADO and LS byte on AD15-AD8. (68000)<br />

; ignored when WTS is low<br />

D2 LAS LONG ADDRESS SELECT<br />

0: Dual 16-bit DMA mode.<br />

1: Single 32-bit DMA mode.<br />

; When LAS is high, the contents of the Remote DMA registers RSARO,1 are issued as A16-A31<br />

Power up high.<br />

D3 LS LOOPBACK SELECT<br />

0: Loopback mode selected. Bits D1, D2 of the TCR must also be programmed for Loopback<br />

operation.<br />

1: Normal Operation<br />

D4 AR AUTOINITIALIZE REMOTE<br />

0: Send Command not executed, all packets removed from Buffer Ring under program control.<br />

1 : Send Command executed, Remote DMA autoinitialized to remove packets from Buffer ring.<br />

NOTE: Send Command cannot be used with 68000 type processors.<br />

D5, D6 FTO,FT1 FIFO THRESHOLD SELECT: Encoded FIFO threshhold. Establishes point at which bus is<br />

requested when filling or emptying the FIFO. During reception, the FIFO threshold indicates the<br />

number of bytes (or words) the FIFO has filled serially from the network before bus request<br />

(BREQ) is asserted.<br />

Note: FIFO threshold setting determines the DMA burst length.<br />

RECEIVE THRESHOLDS<br />

FT1 FTO Word Wide Byte Wide<br />

0 0 1 Word 2 Bytes<br />

0 1 2 Words 4 Bytes<br />

1 0 4 Words 8 Bytes<br />

1 1 6 Words 12 Bytes<br />

During transmission, the FIFO threshold indicates the number of bytes (or words) the FIFO has<br />

filled from the Local DMA before BREQ is asserted. Thus, the transmit threshold is 16 bytes, less<br />

the receive threshold.<br />

1-71

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