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~ National ~ Semiconductor - Al Kossow's Bitsavers

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4.0 Electrical Specifications (Continued)<br />

Slow Buffered Write of IMEM (Notes 1,2)<br />

Symbol 10# Parameter Formula Min Max Units<br />

tSU-RW-CO 1 RAE, REM-WR Falling before ClK-OUT Rising 14 ns<br />

tH-RW-X 2 RAE, REM-WR Rising before ClK-OUT Rising 0 ns<br />

tSU-CMD-CO 3 CMD Valid before ClK-OUT Falling 0 ns<br />

tH-CMD-CO 4 CMD Invalid after ClK-OUT Falling 35 ns<br />

tpD-RW-X 5 RAE, REM-WR Falling to XACK Falling 40 ns<br />

tZA-LCL-AAD 6 A, AD Disabled before lCl Rising 2 ns<br />

tAZ-LCL-AAD 7 A, AD Enabled before lCl Falling 17 ns<br />

tPD-LCL -IA-b 8 lCl Falling to Next IA Valid T+ -32 0 ns<br />

tPD-IWR-X 9 IWR Falling before XACK Rising (nIW+1)T+ -28 ns<br />

tPD-RR-IWR-b 10 REM-WR, RAE Rising to IWR Rising 8 ns<br />

tZA-IWR-I-b 11 IWR Falling to I Enabled 0 ns<br />

tAZ-IWR-I-b 12 IWR Rising to I Disabled 28 51 ns<br />

tPD-I-IWR-b 13 I Valid before IWR Rising (nIW+1)T+ -8 ns<br />

tW-IWR-b 14 IWR low (nlw+1)T+ -1 ns<br />

Note 1: <strong>Al</strong>l parameters are individually tested and guaranteed. Interpreting this data by numerically adding two or more parameters to create a new timing<br />

specification may lead to invalid results.<br />

Note 2: Two remote writes to instruction memory are necessary to store a 16-bit instruction word to IMEM-Iow byte followed by high byte. The timing for the 2nd<br />

write is shown in this diagram. The timing of the first write is the same as a write of the PC or RIC.<br />

......<br />

Slow Buffered Write of IMEM<br />

RAE--<br />

0n°<br />

~<br />

CMoW/A: ~~~$~.@"/.Z<br />

-- 1--0 -- CD --<br />

REM-WR ---,<br />

-0..:1<br />

XACK \<br />

La: ~<br />

WRITE<br />

AO,A<br />

--I --0 -I --0<br />

r-1-\<br />

~ f-I<br />

-0..:1<br />

-1 ~ =t®<br />

IA r-<br />

I<br />

IWR<br />

@i<br />

@<br />

@<br />

TL/F/9336-73<br />

2-84

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