~ National ~ Semiconductor - Al Kossow's Bitsavers

15.0 Switching Characteristics (Continued)
RAO-3
AOSO
I
r-\.
'~
I--rss -:-1 rsh
I
Register Write (Latched Using ADSO)
C
."
01)
c.:I
CD
o
(')
......
z
en
c.:I
..,..
N
CD
o
(')
cs \.\\\' '!~U
I--rswsl-
SWR
-
ACK
ww t wackh
I-- wackl .... r-rwds I rwdh
I
AOO-7 00-7
TLiF/8582-78
Symbol Parameter Min Max Units
rss Register Select Setup to ADSO Low 10 ns
rsh Register Select Hold from ADSO Low 17 ns
aswi Address Strobe Width In 15 ns
rwds Register Write Data Setup 20 ns
rwdh Register Write Data Hold 21 ns
ww Write Strobe Width from ACK 50 ns
wackh Write Strobe High to ACK High 30 ns
wackl Write Low to ACK Low (Notes 1, 2) n'bcyc + 30 ns
rswsl Register Select to Write Strobe Low 10 ns
Note 1: ACK is not generated until CS and SWR are low and the NIC has synchronized to the register access. In Dual Bus Systems additional cycles will be used
for a local DMA or Remote DMA to complete.
Note 2: CS may be asserted before or after SWR. If CS is asserted after SWR, wackl is referenced from falling edge of CS.
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