~ National ~ Semiconductor - Al Kossow's Bitsavers

5.0 Instruction Set Overview (Continued)
In addition to the above jump, call and return program flow
instructions, the BCP is capable of generating software interrupts
via the TRAP instruction. This instruction generates
a call to anyone of 64 possible interrupt table addresses
based on its vector number operand. This allows both the
simulation of hardware interrupts and the construction of
special software interrupts, if desired. The actual interrupt
table entry address is determined by concatenating the Interrupt
Base Register, {lBR l, to an 8-bit representation of
the vector number operand in the TRAP instruction. This
instruction may also clear the [GIE] bit, if desired. Table XX
shows the syntax and operation of the TRAP instruction.
Miscellaneous Instructions
As stated in the "CPU Register Set" section, the BCP has
44 registers with 24 of them arranged into four register
banks: Main Bank A, Alternate Bank A, Main Bank B, and
Alternate Bank B. The exchange instruction, EXX, selects
which register banks are currently available to the CPU, for
example either Main Bank A or Alternate Bank A. The deselected
register banks retain their current values. The EXX
instruction can also alter the state of [GIEI. if desired. Table
XXI shows the EXX instruction syntax and operation.
TABLE XX. TRAP Instruction
Syntax
TRAP v (, g'l
Instruction Operation
PC & [GIE] & ALU flags &
reg. Bank selection _ Address Stack
If "g'" = 1 then clear [GIE]
Form PC address as shown below:
I i i i i i i i 10 i 0 I i i i
{IBRl
v
15 7 5
Note: PC ~ Program Counter; contents in~ially pOints to instruction following call.
[GIE] ~ Global Interrupt Enable bit
IBR ~ Interrupt Base Register
i i
& = concatenation operator, combines operands together forming one long operand.
I I ~ surrounds optional operands; not part of the instruction syntax.
Optional operands may either be specified or omitted.
0
~PC
Operand Range
0,63
Syntax
EXX ba, bb (, gl
TABLE XXI. EXX Instruction
Instruction Operation
Case "ba" of
0: activate Main Bank A
1 : activate Alternate Bank A
End case
Case "bb" of
0: activate Main Bank B
1: activate Alternate Bank B
End case
Case "g" of
0: leave [GIE] unaffected, (default)
1: (reserved)
2: set [GIE]
3: clear [GIE]
End case
Note: [GIE] ~ Global Interrupt Enable bit
I I ~ surrounds optional operands; not part of the instruction syntax.
Optional operands may either be specified or omitted.
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