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~<strong>National</strong> ~ <strong>Semiconductor</strong> \ J microCMOS NSC858 Universal Asynchronous Receiver ITransmitter General Description The NSC858 is a CMOS programmable Universal Asynchronous Receiver/Transmitter (UART). It has an on chip programmable baud rate generator. The UART, which is fabricated using microCMOS silicon gate technology, functions as a serial receiver/transmitter interface for your microcomputer system. The transmitter converts parallel data from the CPU to serial form and shifts it out in the standard asynchronous communication data format. Appropriate start, parity, and stop bits are added to the outgoing serial stream. Incoming serial data is converted to parallel form by the receiver. The receiver checks incoming data for errors (parity, overrun, framing or break interrupt) and then converts it from serial to parallel for transfer to the CPU. Five pins on the chip are available for modem control functions or general purpose I/O. The NSC858 has a programmable baud generator that is capable of dividing the timing reference clock input by divisors of 1 to (216_1), and producing a 1X, 16X, 32X, 64X clock for driving the transmitter and/or receiver logic. Both the transmitter and receiver can either be driven by an external clock or the internal baud rate generator. The NSC858 has an interrupt system that can be tailored to the user's requirements. In addition to the CMOS power consumption levels there are hardware and software power down modes which further reduce power consumption levels. System Configuration ADDRESS/DATA ~V 11_19 8US 6-13 128 r------.", ~-'"N .-~' Vee ADO-AD7 K:::: ::J ADO-AD7 RxC/8RGOUT 21 I' W ' R,D ...,:.:....--- Features • Maximum baud rate 256k BPS (16X), 1 M BPS (1 X) • Programmable baud rate generator • Double buffered receiver and transmitter • Independently configured receiver and transmitter - 5-,6-, 7-, 8-bit characters - Odd, even, force high, force low, or no parity - 1, 1 %, 2 stop bits • Five bits modem I/O or general purpose I/O (3 input, 2 output) • Programmable auto enables for CTS and DCD • Local and remote loopback diagnostics • False start bit detection • Break condition detection and generation • Program polled, or interrupt driven operation - 8 maskable status conditions for receiver and transmitter interrupt - 4 maskable status conditions for modem interrupt • Variable power supply (2.4V-6.0V) • Low power consumption with software and hardware power down modes • 8-bit multiplexed address/data bus directly compatible with NSC800TM 20 1 RECEIVER RSTA 22 22 iiTt TxC/BRGOUT ,.4.,1-:-8____ 1 T,O 19 TRANSMITTER RESET 0AU1T3 :7 ~ MR NSC800 CE NSC858 Rij 32 3 Rij ilCii ..,2".3___ Wii 31 4 Wii RTS t-'2,,-4 ___ .. _____ ALE 30 5 ALE om r.2::- 5 ___ CLK Iir+--.....!!. XIN CTS ..,26::-__ _ PS ..... 39 :, 17: .._jijj05::.:.._.!!:N~DD":-S_Rl~2"-7--- XOUT 16 o:¥4 1 MODEM CONTROL OR GENERAL PURPOSE I/O TL/C/5593-1 4-93
co ,---------------------------------------------------------------------------------, .." co Table of Contents ~ Z 1.0 ABSOLUTE MAXIMUM RATINGS 9.0 REGISTERS (Continued) 2.0 OPERATING CONDITIONS 3.0 DC ELECTRICAL CHARACTERISTICS 4.0 AC ELECTRICAL CHARACTERISTICS 5.0 TIMING WAVEFORMS 6.0 CONNECTION DIAGRAMS 9.6 RT Status Register 9.7 RT Status Mask Register 9.8 Modem Status 9.9 Modem Mask Register 9.10 Power Down Register 9.11 Master Reset Register 9.12 Baud Rate Generator Divisor Latch 7.0 PIN DESCRIPTIONS 7.1 Input Signals 7.2 Output Signals 7.3 Input/Output Signals 8.0 BLOCK DIAGRAM 9.0 REGISTERS 9.1 Receiver and Transmitter Holding Register 9.2 Receiver Mode Register 9.3 Transmitter Mode Register 9.4 Global Mode Register 9.5 Command Register 10.0 FUNCTIONAL DESCRIPTION 10.1 Programmable Baud Generator 10.2 Receiver and Transmitter Operation 10.3 Transmitter Operation 10.4 Typical Clock Circuits 10.5 Receiver Operation 10.6 Programming the NSC858 10.7 Diagnostic Capabilities 11.0 ORDERING INFORMATION 12.0 RELIABILITY INFORMATION 4-94
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~ National ~ Semiconductor 400014 R
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TRADEMARKS Following is the most cu
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II) c ~ ~National ~ ~ Semiconductor
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Table of Contents (Continued) Secti
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Alpha-Numeric Index(continUed) DS36
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Section 1 Local Area Networks IEEE
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~National ~ Semiconductor DP8390C/N
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3.0 Functional Description (Continu
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5.0 Pin Descriptions (Continued) BU
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6.0 Direct Memory Access Control (D
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7.0 Packet Reception (Continued) Re
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8.0 Packet Transmission (Continued)
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10.0 Internal Registers (Continued)
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12.0 Loopback Diagnostics (Continue
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13.0 Bus Arbitration and Timing The
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15.0 Switching Characteristics AC S
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15.0 Switching Characteristics (Con
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AC Timing Test Conditions Input Pul
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2.0 Block Diagram COL CRS PROTOCOL
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4.0 Transmit/Receive Packet Encapsu
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5.0 Pin Descriptions (Continued) BU
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7.0 Packet Reception (Continued) fo
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7.0 Packet Reception (Continued) Er
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9.0 Remote DMA The Remote DMA chann
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11.0 Initialization Procedures (Con
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AC Timing Test Conditions Input Pul
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2.0 Block Diagram TRANSCEIVER CABLE
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PCC Connection Diagram 39.0. 39.0.
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6.0 Absolute Maximum Ratings Recomm
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9.0 Timing and Load Diagrams (Conti
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2.0 Block Diagram COAX CABLE r ____
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6.0 Absolute Maximum Ratings (Note
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I: • • • • • • Interrup
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PAL20LB Decode and DMA Interface Lo
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~ U16/8 R1 R1,R2=4.7k.o. Note: For
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Although Cheapernet is intended for
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The transmitted packet from the SNI
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Truth Table for Various Collision D
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CHEAPERNET APPLICATION WITH THE DP8
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DP8390 Network Interface Controller
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ping between the received address a
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If the current local DMA address ev
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6.2 Dual Port Memory One popular me
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StarLAN With The DP839EB Evaluation
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SUPPORTING DOCUMENTS The following
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Pulse Transformer U3 .----. j " "P>
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ELECTROSTATIC DISCHARGE TEST (ESD)
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Section 2 Contents DP8340INS32440 I
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.. 0 C'I C") en .... z 0 C") GO Go
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Timing Characteristics Oscillator F
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Timing Waveforms (Continued) TA REG
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.. ... ~ ~National ~ ~ Semiconduc
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Detailed Functional Pin Description
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Message Format (Continued) DATA REC
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Timing Characteristics (Notes 2, 6,
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Timing Waveforms (Continued) 4T±(T
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Typical Applications (Continued) +5
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Timing Characteristics (Continued)
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Functional Timing Waveforms (Contin
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Typical Applications (Continued) DA
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Absolute Maximum Ratings (Note 1) I
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MUX~ __________________ The BIPLAN
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An EPROM implementation was selecte
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MASTER MUL TIPLEXING/DE-MUL TIPLEXI
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AN·496 '" 0, '" (U17/ (U23/6) TO 5
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AN·496
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DP8342/DP8343 HIGH SPEED INTERFACE
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2.0 Connection Diagram A13- 12 A12-
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3.0 Pin Descriptions (Continued) Si
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~ ~ 4.0 Electrical Specifications (
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4.0 Electrical Specifications (Cont
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5.0 Instruction Set Overview (Conti
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6.0 Instruction Set Reference (Cont
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7.0 CPU Registers (Continued) BIT I
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7.0 CPU Registers (Continued) BIRO
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7.0 CPU Registers (Continued) 76543
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7.0 CPU Registers (Continued) BIT D
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7.0 CPU Registers (Continued) BIT D
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8.0 Remote Interface and Arbitratio
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10.0 Transceiver (Continued) (a) 32
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10.0 Transceiver (Continued) TABLE
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10.0 Transceiver (Continued) dotted
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10.0 Transceiver (Continued) TABLE
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10.0 Transceiver (Continued) {also
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Decoding Bit Fields with the JRMK I
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Receiver Interrupts/Flags for the D
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"Interrupts"-A Powerful Tool of the
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TABLE II. (lCR) Interrupt Mask Bits
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Running the DP8344 with wait states
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» z I U'I Q 01:00 INSTRUCTION ADDR
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WHY EPROM SOFT-LOAD? In a stand-alo
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RESET ~. Timing at Beginning of Ins
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.. I CRYSTAL ~~~.~ I UP TO 64K OP83
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The roll-off frequency, Fro, should
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ceives messages whose first frame a
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RECEIVER INTERRUPT The receiver int
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JMP n LJMP n JMPR Rs JMPI Ptr JRMK
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00044 F90a :J- 226 Z • 227 MOVE A
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l> Z 00074 80BD 2'18 en • 00075 0
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Section 3 ISDN Components
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Introduction To National Semiconduc
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NSC Solutions for Layers 2 and 3 Na
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NSC Solutions: Systems Level Basic
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~National ~ Semiconductor PRELIMINA
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ISDN DEFINITIONS "B" Channel, or DS
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~ '" TE2 UP TO 8 TERMINALS -
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Section 4 Contents INS8250/INS8250-
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3.0 AC Electrical Characteristics T
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. ID
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5.0 Block Diagram INTERNAL DATA IUS
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6.0 Pin Descriptions (Continued) In
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8.0 Registers (Continued) and 1, on
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8.0 Registers (Continued) 8.5 INTER
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4.0 Timing Waveforms (Continued) Re
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6.0 Pin Descriptions (Continued) Re
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8.0 Registers The system programmer
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8.0 Registers (Continued) 8.3 PROGR
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8.0 Registers (Continued) Table II
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9.0 Typical Applications (Continued
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Table of Contents 1.0 ABSOLUTE MAXI
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3.0 AC Electrical Characteristics T
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4.0 Timing Waveforms (Continued) Wr
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Page 468 and 469: TITLE 550APP.ASM - NS16550A INITIAL
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Page 472 and 473: DIAPPS.ASM Flow Chart l> z • ~ CO
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Page 476 and 477: COMPARE: SET UP COMPARE BUffER POIN
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Page 480 and 481: holdloop: nop # br hold loop # # #*
Page 482 and 483: # msint: save [rO,rl,r2,r3] # movd
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Page 490 and 491: A Comparison of the I NS8250, NS 16
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Page 508 and 509: 6.0 Connection Diagrams Dual-In-Lln
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Page 519 and 520: Section 5 Contents MM74HC942 300 Ba
Page 521 and 522: Absolute Maximum Ratings (Notes 1 &
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Page 525 and 526: Applications Information (Continued
Page 527 and 528: Absolute Maximum Ratings (Notes 1 &
Page 529 and 530: Description of Pin Functions Pin No
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Page 535 and 536: Electrical Characteristics Unless o
Page 537 and 538: C'I 5 Pin Descriptions (Continued)
Page 539 and 540: IlAV22 RXIN LOCAL OSCILLATOR (L.O.)
Page 541 and 542: Functional Description (Continued)
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Functional Description* (Continued)
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,...A212AT RECEIVE FILTER p--------
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TABLE III. Remote Digital Loopback
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Section 6 Transmission Line Drivers
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~National ~ Semiconductor Transmiss
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~National ~ Semiconductor OS 1488 Q
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J?'A National ~ Semiconductor OS 14
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~National ~ Semiconductor DS26C31 C
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~National ~ Semiconductor DS26C32C
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~National ~ Semiconductor DS34C86 Q
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~National ~ Semiconductor PRELIMINA
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~National ~ Semiconductor DS1692/DS
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~National ~ Semiconductor DS75150 D
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~National ~ Semiconductor DS75176A/
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~National ~ Semiconductor DS8922/22
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~National ~ Semiconductor DS96172/~
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~National ~ Semiconductor DS961771
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~National ~ Semiconductor DS9637 AI
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• I .----------------------------
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Section 7 Physical Dimensions
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~National ~ Semiconductor All dimen
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NS Package N16A N16A(REV E) 0.092 X
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0.11M-0.118 (2.642-2.9971 .. ••
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NOTES
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~National ~ Semiconductor Bookshelf
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RELIABILITY HANDBOOK-1986 Reliabili
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NATIONAL SEMICONDUCTOR CORPORATION
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NATIONAL SEMICONDUCTOR CORPORATION
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~ National ~ Semiconductor
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