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6.0 Instruction Set Reference (Continued)
Figure 5 illustrates the "Blocked If" structure.
If condition then
operation
operation
etc ...
End if
FIGURE 5. Blocked If Structure
In the "Blocked If" structure, if the condition is met then all
the operations between the "If" statement and the "End if"
statement are performed. Figure 6 illustrates the "Blocked
Case" structure.
Case operand of
0: operation
1: operation
2: etc ...
End case
FIGURE 6. Blocked Case Structure
In the "Blocked Case" structure, the operation preceded by
the equivalent numeric value of the operand is executed.
For example, if the operand's value is equal to "1" then the
operation preceded by "1:" is executed.
One final note, two reference tables have been added to the
back of the Instruction Set Reference section. The first table,
Table XXIII, lists all the instructions with their associated
T-states, Affected Flags, and Bus Timing figure numbers in
a compact format. The second table, Table XXIV, lists all
the instructions in opcode order to facilitate disassembly.
TABLE XXII. Notational Conventions for Instruction Set
Symbol Represents Meaning Length
n Ot0255 Unsigned Number 8 Bits
+ 127 to - 128 Signed Number
nn Ot065535 Unsigned Number 16 Bits
Rs RO-R31 Source Register
Rd RO-R31 Destination Register
Rsd RO-R31 Combination Source/Destination Register
rs RO-R15 Limited Source Register
rd RO-R15 Limited Destination Register
rsd RO-R15 Limited Combination Source/Destination Register
Ir IW,IX,IY,IZ Index Register
mlr
Ir -
Ir
Ir +
+Ir
Index Register in One of the Following Address Modes:
Post Decrement
No Change
Post Increment
Pre-Increment
b 0-7 Shift Field 3 Bits
m 0-7 Mask Field 3 Bits
p 0-7 Position Field 3 Bits
s 0-1 State Field 1 Bit
f 0-7 Flag Reference Field 3 Bits
cc
Condition Code Instruction Extensions
v 0-63 Vector Field 6 Bits
g 0-3 Global Interrupt Enable Flag [GIE] Status Control 2 Bits
g' 0-1 Global Interrupt Enable Flag [GIE] Limited Status Control 1 Bit
rf 0-1 Register Bank and ALU Flag Status Control 1 Bit
ba 0-1 Register Bank A Select 1 Bit
bb 0-1 Register Bank B Select 1 Bit
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