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~ National ~ Semiconductor - Al Kossow's Bitsavers

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5.0 Instruction Set Overview (Continued)<br />

The BCP also has a specialized relative jump instruction<br />

called relative Jump with Rotate and Mask on source register,<br />

JRMK. This instruction facilitates the decoding of register<br />

fields often involved in communications processing.<br />

JRMK does this by rotating and masking a copy of its register<br />

operand to form a signed program counter displacement<br />

which usually pOints into a jump table. Table XV shows the<br />

syntax and operation of the JRMK instruction.<br />

JRMK's masking, (setting to zero), the least significant bit of<br />

the displacement allows the construction of a jump table<br />

using either one or two word instructions; for instance, a<br />

table of JMP and/or LJMP instructions, respectively. The<br />

example in Figure 3 demonstrates the JRMK instruction decoding<br />

the address frame of the 3299 Terminal Multiplexer<br />

protocol which is located in the Receive/Transmit Register,<br />

{RTR[4-2]I.<br />

The BCP has two unconditional call instructions; CALL,<br />

which supports relative instruction addressing and LCALL,<br />

(Long CALL), which supports absolute instruction addressing.<br />

These instructions push the following information onto<br />

the CPU's internal Address Stack: the address of the next<br />

instruction; the status of the Global Interrupt Enable flag,<br />

[GIE]; the status of the ALU flags [Z], [C], [N], and [V]; and<br />

the status of which register banks are currently active. Table<br />

XVI lists the two unconditional call instructions. Note that<br />

the Address Stack is only twelve positions deep; therefore,<br />

the BCP allows twelve levels of nested subroutine invocations,<br />

(this includes both interrupts and calls).<br />

JRMK<br />

Syntax<br />

Rs, b, m<br />

TABLE XV. JRMK Instruction<br />

Instruction Operation<br />

(a) Rotate a copy of register "Rs" "b" bits to the right.<br />

(b) Mask the most significant "m" bits and the least<br />

significant bit of the above result.<br />

(c) PC + resulting displacement (sign extended) - PC.<br />

Note: PC = Program Counter, contents initially points to instruction following jump.<br />

Displacement<br />

Range<br />

-128, + 126<br />

Addressing Mode<br />

Register<br />

Example Code<br />

JRMK RTR, 1, 4 ;decode terminal address<br />

LJMP ADDR.O ;jump to device handler #0<br />

LJMP ADDR.l ;jump to device handler #1<br />

LJMP ADDR.7 ;jump to device handler #7<br />

(a)<br />

(b)<br />

(c)<br />

(d)<br />

(e)<br />

Instruction Execution<br />

JRMK Displacement Register Contents<br />

Copy {RTR l into JRMK's displacement register: x x x A2 A1 AO Y y<br />

Rotate displacement register 1 bit to the right: y x x x A2 A1 AO y<br />

AND result with "00001110" binary mask: o o 0 0 A2 A1 AO o<br />

Sign extended resulting displacement and add<br />

it to the program counter, (PC).<br />

If the bits A2 A 1 AO equal "0 0 1 " binary then<br />

+ 2 is added to the Program Counter;<br />

o o o o o o o<br />

(Le., PC + 2 - PC).<br />

Execute the instruction pointed to by the PC,<br />

which in this example is:<br />

LJMP ADDR.1<br />

FIGURE 3. JRMK Instruction Example<br />

TABLE XVI. Unconditional Call Instructions<br />

Syntax<br />

Instruction Operation<br />

Operand<br />

Range<br />

CALL n PC & [GIE] &ALU flags & reg. bank selection - Address Stack -128, + 127<br />

PC + n (sign extended) - PC<br />

LCALL nn PC & [GIE] & ALU flags & reg. bank selection - Address Stack 0,64k<br />

nn -<br />

Note: PC = Program Counter; contents initially points to instruction following call.<br />

[GIE] ~ Global Interrupt Enable bit.<br />

PC<br />

& = concatenation operator, combines operands together forming one long operand.<br />

Addressing Mode<br />

Immediate<br />

Absolute<br />

2-96

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