Une Boite `a Outils Pour la Preuve Formelle de Syst`emes Séquentiels

146 BIBLIOGRAPHIE
[47] O. Coudert, J. C. Madre, “A Unified Framework for the Formal Verification of
Sequential Circuits”, in Proc. of ICCAD’90, Santa Clara CA, USA, novembre 1990.
[48] O. Coudert, J. C. Madre, “Symbolic Computation of the Valid States of a Sequential
Machine: Algorithms and Discussion”, in Proc. of the International Worshop on
Formal Methods in VLSI Design, Miami, USA, janvier 1991.
[49] O. Coudert, J. C. Madre, “A New Method to Compute Prime and Essential Prime
Implicants of Boolean Functions”, in Proc. of the MIT VLSI Conference, Cambridge
MA, USA, mars 1992.
[50] O. Coudert, J. C. Madre, “Implicit and Incremental Computation of Primes and
Essential Primes of Boolean functions”, in Proc. of the 29th DAC, Anaheim CA,
USA, Juin 1992.
[51] O. Coudert, J. C. Madre, “A New Implicit DAG Based Prime and Essential Prime
Computation Technique”, in Proc. of the International Symposium on Information
Sciences, Fukuoka, Japon, juillet 1992.
[52] J. A. Darringer, “The Application of Program Verification Techniques to Hardware
Verification”, in Proc. of the 16th DAC, 1979.
[53] A. Debreil, C. Berthet, A. Jerraya, “Symbolic Computation of VHDL Hierarchical
Descriptions”, in Proc. of the First European Conference on VHDL Methods,
Marseille, France, septembre 1990.
[54] J. P. Delahaye, Outils Logiques pour l’Intelligence Artificielle, Editions Eyrolles,
1986.
[55] S. Devadas, H. K. Ma, and R. Newton, “On the Verification of Sequential Machines
at Differing Levels of Abstraction”, IEEE Transactions on CAD, Vol. 7, No. 6,
juin 1988.
[56] D. L. Dill, Trace Theory for Automatic Hierarchical Verification of Speed-
Independent Circuits, PhD Thesis, Carnegie Mellon University, 1988.
[57] P. E. Dunne, The Complexity of Boolean Networks, APIC Series N o 29, Academic
Press, 1988.
[58] D. Dietmeyer, Logic Design of Digital Systems, Allyn and Bacon, 2nd edition, 1978.
[59] E. A. Emerson, “Temporal and Modal Logic”, Formal Models and Semantics, Handbook
of Theorical Computer Science, Jan van Leeuwen Editor, Elsevier, pp. 995–
1072, 1990.
[60] R. Enders, T. Filkorn, D. Taubner, “Generating BDDs for Symbolic Model Checking
in CCS”, in Proc. of Computer-Aided Verification’92, Montreal, 1992.
[61] P. Flajolet, J. M. Steyaert, “A Complexity Calculus for Recursive Tree Algorithms”,
Mathematical Systems Theory, Vol 19, pp. 301–331, Springer-Verlag, 1987.