Molecular beam epitaxial growth of III-V semiconductor ... - KOBRA
Molecular beam epitaxial growth of III-V semiconductor ... - KOBRA
Molecular beam epitaxial growth of III-V semiconductor ... - KOBRA
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Optimization <strong>of</strong> MEE and MBE <strong>growth</strong> <strong>of</strong> GaP Buer on Silicon Substrate<br />
signicantly less concern regarding methods to reduce nucleation <strong>of</strong> mist dislocations<br />
and managing the threading dislocation density via methods such as graded<br />
buers. The critical thickness for GaP on Si(001) is approximately 70 nm [126],<br />
beyond which the energy necessary to nucleate a mist dislocation becomes lower<br />
than the energy buildup <strong>of</strong> increasing lattice strain as the GaP layer thickness<br />
increases. In comparison to GaAs, the Matthews-Blakeslee critical thickness <strong>of</strong><br />
GaAs/Si system is about ∼ 1 nm [127].<br />
Another critical theoretical issue mentioned in literature is the potential <strong>growth</strong><br />
problems associated with a large dierence in the coecients <strong>of</strong> thermal expansion<br />
for GaP and Si. However, the thermal expansion coecient <strong>of</strong> a given material<br />
is related to the expansion or contraction <strong>of</strong> the crystal lattice as the material's<br />
temperature changes. Commonly, the lattice expands under increased temperature,<br />
and returns to its original dimensions as the temperature is reduced. Si has<br />
a coecient <strong>of</strong> thermal expansion <strong>of</strong> 2.6 × 10 −6 K −1 , while GaP has a coecient<br />
<strong>of</strong> 4.7×10 −6 K −1 . The dierence in thermal expansion coecients also aects the<br />
rate in which the two crystals contract during post-<strong>growth</strong> and cool-down steps.<br />
Because the silicon substrate contracts more slowly than the GaP epilayer, tensile<br />
strain may accumulate. If the epilayer is thick, the additional tensile strain can<br />
result in micro-cracking. In GaAs/Si, such cracks do not typically appear until<br />
the GaAs layer is 3-5 µm thick [55]. This dierence has the potential to cause<br />
cracking during cooling after <strong>growth</strong> at high temperatures [128]. It is unknown<br />
at what thickness micro-cracking will occur in the GaP/Si system, but it is not<br />
expected to be an issue when GaP thickness do not exceed 1 µm, as is the case<br />
in the work reported here. In this chapter, the optimization <strong>of</strong> GaP <strong>growth</strong> using<br />
dierent <strong>growth</strong> modes will be discussed in details. In agreement with thesis<br />
approach, the results <strong>of</strong> GaP <strong>growth</strong> reported here are also below the critical<br />
thickness, with an ultimate goal to achieve the planar <strong>growth</strong> <strong>of</strong> GaP on silicon<br />
substrate with uniform smooth surface and 2D morphology prole. The successful<br />
<strong>epitaxial</strong> integration <strong>of</strong> GaP/Si structure will be very benecial to many<br />
optoelectronic applications.<br />
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