Molecular beam epitaxial growth of III-V semiconductor ... - KOBRA

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Optimization of MEE and MBE growth of GaP Buer on Silicon Substrate signicantly less concern regarding methods to reduce nucleation of mist dislocations and managing the threading dislocation density via methods such as graded buers. The critical thickness for GaP on Si(001) is approximately 70 nm [126], beyond which the energy necessary to nucleate a mist dislocation becomes lower than the energy buildup of increasing lattice strain as the GaP layer thickness increases. In comparison to GaAs, the Matthews-Blakeslee critical thickness of GaAs/Si system is about ∼ 1 nm [127]. Another critical theoretical issue mentioned in literature is the potential growth problems associated with a large dierence in the coecients of thermal expansion for GaP and Si. However, the thermal expansion coecient of a given material is related to the expansion or contraction of the crystal lattice as the material's temperature changes. Commonly, the lattice expands under increased temperature, and returns to its original dimensions as the temperature is reduced. Si has a coecient of thermal expansion of 2.6 × 10 −6 K −1 , while GaP has a coecient of 4.7×10 −6 K −1 . The dierence in thermal expansion coecients also aects the rate in which the two crystals contract during post-growth and cool-down steps. Because the silicon substrate contracts more slowly than the GaP epilayer, tensile strain may accumulate. If the epilayer is thick, the additional tensile strain can result in micro-cracking. In GaAs/Si, such cracks do not typically appear until the GaAs layer is 3-5 µm thick [55]. This dierence has the potential to cause cracking during cooling after growth at high temperatures [128]. It is unknown at what thickness micro-cracking will occur in the GaP/Si system, but it is not expected to be an issue when GaP thickness do not exceed 1 µm, as is the case in the work reported here. In this chapter, the optimization of GaP growth using dierent growth modes will be discussed in details. In agreement with thesis approach, the results of GaP growth reported here are also below the critical thickness, with an ultimate goal to achieve the planar growth of GaP on silicon substrate with uniform smooth surface and 2D morphology prole. The successful epitaxial integration of GaP/Si structure will be very benecial to many optoelectronic applications. 116
7.2 GaP/Si Growth Approach 7.2 GaP/Si Growth Approach Practically almost all researchers report that immediately after the epitaxial growth of GaP on Si starts, RHEED patterns show the formation of point reections, pointing to the 3D character of the growth process [129]. The initiation of III-V material on a group IV surface is surrounded with complications, resulting in island-like growth, as was previously explained [130, 131]. Migration enhanced epitaxy (MEE) is a method that has proven to be successful in inducing 2D (i.e. layer-by-layer) growth at the initial stages of heteroepitaxy for GaAs/Ge [132]. Similarly, this method can be also applied to the system of GaP/Si like in the case of GaAs/Ge system. MEE works by exposing the substrate to one III-V constituent (i.e. Ga or P) at a time, allowing additional time for atomic surface migration, encouraging planar growth. This growth method was a prerequisite to eliminate nucleation-related defects in the case of GaAs/Ge, and has already been used for GaP/Si MBE growth, showing improvement to material quality [132]. Therefore, the MEE growth step for the rst 5-10 nm is very important, and it will work like a virtual GaP substrate, that initiate the growth of the next MBE mode growth process at higher temperature. The approach of GaP growth reported here is consisting of two steps optimization. The rst step conducted via MEE mode at low growth temperature of 350 ◦ C, while the second step is performed at higher growth temperature of 545 ◦ C using MBE growth mode [133, 49]. However, the transition phase from MEE to MBE mode during epitaxy was also carefully optimized. 7.3 Experimental Details Missoriented P-type Si(100) substrates with 5 ◦ o-cut underwent ex-situ wet etching using BHF for 2 min, and in less than 10 min they were loaded in the MBE system for further in-situ surface treatment. At a temperature of 900 ◦ C an in-situ oxide thermal desorption step was carried out for 15 min. After that, the substrate temperature was reduced to 300 ◦ C and exposed to arsenic ux with an beam equivalent pressure of 4 × 10 −7 Torr for 4 min for thin As layer deposition. Two MBE systems were used for this study. The high-temperature 117
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Molecular Beam Epitaxial Growth of
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Gutachter (Supervisors): 1. Prof. D
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patterns indicating a 2D smooth sur
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(MEE = migration enhance epitaxy) u
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CONTENTS 3.4.4 Planar Defects Assoc
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CONTENTS xii
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Introduction thesis a detailed stud
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Introduction 1.1.2 Thesis Approach
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Introduction 1.2 Thesis Outline The
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Theoretical Background of Semicondu
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Heteroepitaxial Growth of III-V Sem
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Experimental Growth and Characteriz
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MBE Growth of Self-Assembled InAs a
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Page 144 and 145: REFERENCES [8] J. M. Gerard, O. Cab
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Page 148 and 149: REFERENCES [49] M. R. Brenner: GaP/
Page 150 and 151: REFERENCES [66] Y. Ishida, T. Takah
Page 152 and 153: REFERENCES [84] A. Garcia, C. M. Ma
Page 154 and 155: REFERENCES [100] M. Felici, P. Gall
Page 156 and 157: REFERENCES [116] H. Usui, H. Yasuda
Page 158 and 159: REFERENCES [133] Grassman, T. J. Br
Page 160 and 161: Conferences Contributions: Tariq Al
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Molecular beam epitaxial growth of III-V semiconductor ... - KOBRA

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