Molecular beam epitaxial growth of III-V semiconductor ... - KOBRA
Molecular beam epitaxial growth of III-V semiconductor ... - KOBRA
Molecular beam epitaxial growth of III-V semiconductor ... - KOBRA
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Conclusions<br />
substrates, respectively.<br />
The post <strong>growth</strong> annealing together with Si capping resulted in a very interesting<br />
structure evolution and <strong>growth</strong> scenario through vacancy stacking faults<br />
(V-SF) and circular-voids formation. The circular-voids and V-SF kinetics shows<br />
strong dependence on the substrate temperature. During temperature ramping<br />
up to 800 ◦ C total recrystallization and reconstruction <strong>of</strong> the grown structure has<br />
been observed. The InAs vapor interact with Si walls and conned in the voids,<br />
evolved nally to a nearly spherical QD shape, which results in a defect-free Si<br />
matrix <strong>growth</strong> around the InAs QDs.<br />
GPA 2D strain mapping derived from high-resolution TEM structure images<br />
conrmed fully relaxed QDs with no detectable strain gradients in the Si matrix<br />
around InAs clusters. On the other hand, anisotropic lattice distortions inside the<br />
InAs clusters are identied, which are characterized by compressive and tensile<br />
strain distributions in the two mapped directions, i.e. parallel and perpendicular<br />
to the <strong>growth</strong> direction. This residual strain is discussed based on the thermal<br />
mismatch between InAs and Si. The lattice strain is released by dislocation loops<br />
localized along the InAs/Si interface consisting <strong>of</strong> perfect 60 ◦ -type dislocations,<br />
while the thermal stress is released by SFs generation during cool down process.<br />
Successful MBE <strong>growth</strong> <strong>of</strong> n-type (As 4 ) doped silicon with a controlled doping<br />
prole and doping levels up to 7×10 17 cm −3 as well as P-N junctions characteristics<br />
have been achieved.<br />
The site-controlled <strong>growth</strong> <strong>of</strong> GaAs/In 0.15 Ga 0.85 As/GaAs nanostructures has<br />
been demonstrated for the rst time with 1 µm spacing and very low nominal<br />
deposition thicknesses, directly on pre-patterned Si without the use <strong>of</strong> SiO 2 mask.<br />
The optimized GaP <strong>growth</strong> with best RMS values <strong>of</strong> 1.3 nm for the MBE-GaP<br />
<strong>growth</strong> was obtained without <strong>growth</strong> stop between GaP-MEE and GaP-MBE, and<br />
with the increased Ga <strong>growth</strong> rate from 100 nm to 300 nm during the temperature<br />
ramping from MEE to MBE <strong>growth</strong> mode. We can conclude that the thin GaP-<br />
MEE/Si shows great promise as a virtual substrate for <strong>III</strong>-V on Si <strong>growth</strong>. These<br />
results are highly encouraging for the realization and integration <strong>of</strong> <strong>III</strong>-V on Si<br />
optical devices for potential applications.<br />
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